Merge "msm: mdss: workaround for bwc and panic" (8400bf95) · Commits · e / devices / android_kernel_sony_msm8994

drivers/video/msm/mdss/mdss.h

+29 −2

Original line number	Diff line number	Diff line
		@@ -26,6 +26,7 @@
		#include "mdss_panel.h"

		#define MAX_DRV_SUP_MMB_BLKS 44
		#define MAX_DRV_SUP_PIPES 10

		#define MDSS_PINCTRL_STATE_DEFAULT "mdss_default"
		#define MDSS_PINCTRL_STATE_SLEEP "mdss_sleep"
		@@ -114,6 +115,11 @@ enum mdss_bus_clients {
		MDSS_MAX_BUS_CLIENTS
		};

		enum mdss_hw_quirk {
		MDSS_QUIRK_BWCPANIC,
		MDSS_QUIRK_MAX,
		};

		struct mdss_data_type {
		u32 mdp_rev;
		struct clk *mdp_clk[MDSS_MAX_CLK];
		@@ -132,7 +138,18 @@ struct mdss_data_type {

		struct mutex reg_lock;

		/* bitmap to track pipes that have BWC enabled */
		DECLARE_BITMAP(bwc_enable_map, MAX_DRV_SUP_PIPES);
		/* bitmap to track hw workarounds */
		DECLARE_BITMAP(mdss_quirk_map, MDSS_QUIRK_MAX);
		/* bitmap to track total mmbs in use */
		DECLARE_BITMAP(mmb_alloc_map, MAX_DRV_SUP_MMB_BLKS);

		u32 has_bwc;
		u32 default_panic_lut0;
		u32 default_panic_lut1;
		u32 default_robust_lut;

		u32 has_decimation;
		bool has_fixed_qos_arbiter_enabled;
		bool has_panic_ctrl;
		@@ -207,8 +224,6 @@ struct mdss_data_type {
		u8 ncursor_pipes;
		u32 max_cursor_size;

		DECLARE_BITMAP(mmb_alloc_map, MAX_DRV_SUP_MMB_BLKS);

		struct mdss_mdp_mixer *mixer_intf;
		struct mdss_mdp_mixer *mixer_wb;
		u32 nmixers_intf;
		@@ -321,6 +336,18 @@ static inline int mdss_get_sd_client_cnt(void)
		return atomic_read(&mdss_res->sd_client_count);
		}

		static inline void mdss_set_quirk(struct mdss_data_type *mdata,
		enum mdss_hw_quirk bit)
		{
		set_bit(bit, mdata->mdss_quirk_map);
		}

		static inline bool mdss_has_quirk(struct mdss_data_type *mdata,
		enum mdss_hw_quirk bit)
		{
		return test_bit(bit, mdata->mdss_quirk_map);
		}

		#define MDSS_VBIF_WRITE(mdata, offset, value, nrt_vbif) \
		(nrt_vbif ? dss_reg_w(&mdata->vbif_nrt_io, offset, value, 0) :\
		dss_reg_w(&mdata->vbif_io, offset, value, 0))

drivers/video/msm/mdss/mdss_mdp.c

+31 −7

Original line number	Diff line number	Diff line
		@@ -71,7 +71,6 @@ static int mdss_fb_mem_get_iommu_domain(void)
		struct msm_mdp_interface mdp5 = {
		.init_fnc = mdss_mdp_overlay_init,
		.fb_mem_get_iommu_domain = mdss_fb_mem_get_iommu_domain,
		.panel_register_done = mdss_panel_register_done,
		.fb_stride = mdss_mdp_fb_stride,
		.check_dsi_status = mdss_check_dsi_ctrl_status,
		};
		@@ -1095,6 +1094,7 @@ static void mdss_mdp_hw_rev_caps_init(struct mdss_data_type *mdata)
		case MDSS_MDP_HW_REV_105:
		case MDSS_MDP_HW_REV_109:
		case MDSS_MDP_HW_REV_110:
		mdss_set_quirk(mdata, MDSS_QUIRK_BWCPANIC);
		mdata->max_target_zorder = MDSS_MDP_MAX_STAGE;
		mdata->max_cursor_size = 128;
		break;
		@@ -1111,7 +1111,6 @@ static void mdss_hw_rev_init(struct mdss_data_type *mdata)

		mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON);
		mdata->mdp_rev = MDSS_REG_READ(mdata, MDSS_REG_HW_VERSION);
		pr_info_once("MDP Rev=%x\n", mdata->mdp_rev);
		mdss_mdp_hw_rev_caps_init(mdata);
		mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF);
		}
		@@ -1124,7 +1123,7 @@ static void mdss_hw_rev_init(struct mdss_data_type *mdata)
		* parameters. This function does not explicitly turn on the MDP clocks
		* and so it must be called with the MDP clocks already enabled.
		*/
		int mdss_hw_init(struct mdss_data_type *mdata)
		void mdss_hw_init(struct mdss_data_type *mdata)
		{
		int i, j;
		char *offset;
		@@ -1173,8 +1172,6 @@ int mdss_hw_init(struct mdss_data_type *mdata)
		mdss_mdp_hscl_init(&vig[i]);

		pr_debug("MDP hw init done\n");

		return 0;
		}

		static u32 mdss_mdp_res_init(struct mdss_data_type *mdata)
		@@ -1227,13 +1224,11 @@ void mdss_mdp_footswitch_ctrl_splash(int on)
		if (mdata != NULL) {
		if (on) {
		pr_debug("Enable MDP FS for splash.\n");
		mdata->handoff_pending = true;
		ret = regulator_enable(mdata->fs);
		if (ret)
		pr_err("Footswitch failed to enable\n");

		mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON);
		mdss_hw_init(mdata);
		} else {
		pr_debug("Disable MDP FS for splash.\n");
		mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF);
		@@ -1444,6 +1439,7 @@ static int mdss_mdp_probe(struct platform_device *pdev)
		struct resource *res;
		int rc;
		struct mdss_data_type *mdata;
		bool display_on;

		if (!pdev->dev.of_node) {
		pr_err("MDP driver only supports device tree probe\n");
		@@ -1580,6 +1576,34 @@ static int mdss_mdp_probe(struct platform_device *pdev)
		if (rc)
		pr_err("mdss_register_irq failed.\n");
		mdss_res->mdss_util->mdp_probe_done = true;

		/*
		* enable clocks and read mdp_rev as soon as possible once
		* kernel is up. Read the DISP_INTF_SEL register to check if
		* display was enabled in bootloader or not. If yes, let handoff
		* handle removing the extra clk/regulator votes else turn off
		* clk/regulators because purpose here is to get mdp_rev.
		*/
		mdss_mdp_footswitch_ctrl_splash(true);
		mdss_hw_init(mdata);
		display_on = (bool)readl_relaxed(mdata->mdp_base +
		MDSS_MDP_REG_DISP_INTF_SEL);
		if (!display_on)
		mdss_mdp_footswitch_ctrl_splash(false);
		else
		mdata->handoff_pending = true;

		pr_info("mdss version = 0x%x, bootloader display is %s\n",
		mdata->mdp_rev, display_on ? "on" : "off");

		if (mdss_has_quirk(mdata, MDSS_QUIRK_BWCPANIC)) {
		mdata->default_panic_lut0 = readl_relaxed(mdata->mdp_base +
		MMSS_MDP_PANIC_LUT0);
		mdata->default_panic_lut1 = readl_relaxed(mdata->mdp_base +
		MMSS_MDP_PANIC_LUT1);
		mdata->default_robust_lut = readl_relaxed(mdata->mdp_base +
		MMSS_MDP_ROBUST_LUT);
		}
		probe_done:
		if (IS_ERR_VALUE(rc)) {
		if (mdata->regulator_notif_register)

drivers/video/msm/mdss/mdss_mdp.h

+2 −2

Original line number	Diff line number	Diff line
		@@ -890,7 +890,7 @@ int mdss_mdp_pipe_sspp_setup(struct mdss_mdp_pipe pipe, u32 op);
		void mdss_mdp_pipe_sspp_term(struct mdss_mdp_pipe *pipe);
		int mdss_mdp_smp_setup(struct mdss_data_type *mdata, u32 cnt, u32 size);

		int mdss_hw_init(struct mdss_data_type *mdata);
		void mdss_hw_init(struct mdss_data_type *mdata);

		int mdss_mdp_pa_config(struct mdp_pa_cfg_data config, u32 copyback);
		int mdss_mdp_pa_v2_config(struct mdp_pa_v2_cfg_data config, u32 copyback);
		@@ -946,6 +946,7 @@ int mdss_mdp_ctl_addr_setup(struct mdss_data_type mdata, u32 ctl_offsets,

		int mdss_mdp_pipe_fetch_halt(struct mdss_mdp_pipe *pipe);
		int mdss_mdp_pipe_panic_signal_ctrl(struct mdss_mdp_pipe *pipe, bool enable);
		void mdss_mdp_bwcpanic_ctrl(struct mdss_data_type *mdata, bool enable);
		int mdss_mdp_pipe_destroy(struct mdss_mdp_pipe *pipe);
		int mdss_mdp_pipe_queue_data(struct mdss_mdp_pipe *pipe,
		struct mdss_mdp_data *src_data);
		@@ -983,7 +984,6 @@ u32 mdss_mdp_get_mixercfg(struct mdss_mdp_mixer *mixer);
		u32 mdss_mdp_fb_stride(u32 fb_index, u32 xres, int bpp);
		void mdss_check_dsi_ctrl_status(struct work_struct *work, uint32_t interval);

		int mdss_panel_register_done(struct mdss_panel_data *pdata);
		int mdss_mdp_limited_lut_igc_config(struct mdss_mdp_ctl *ctl);
		int mdss_mdp_calib_config(struct mdp_calib_config_data cfg, u32 copyback);
		int mdss_mdp_calib_config_buffer(struct mdp_calib_config_buffer *cfg,

drivers/video/msm/mdss/mdss_mdp_ctl.c

+5 −0

Original line number	Diff line number	Diff line
		@@ -3326,6 +3326,7 @@ int mdss_mdp_display_commit(struct mdss_mdp_ctl ctl, void arg,
		int ret = 0;
		bool is_bw_released;
		int split_enable;
		struct mdss_data_type *mdata = mdss_mdp_get_mdata();

		if (!ctl) {
		pr_err("display function not set\n");
		@@ -3452,6 +3453,10 @@ int mdss_mdp_display_commit(struct mdss_mdp_ctl ctl, void arg,
		commit_cb->commit_cb_fnc(MDP_COMMIT_STAGE_READY_FOR_KICKOFF,
		commit_cb->data);

		if (mdss_has_quirk(mdata, MDSS_QUIRK_BWCPANIC) &&
		!bitmap_empty(mdata->bwc_enable_map, MAX_DRV_SUP_PIPES))
		mdss_mdp_bwcpanic_ctrl(mdata, true);

		ATRACE_BEGIN("flush_kickoff");
		mdss_mdp_ctl_write(ctl, MDSS_MDP_REG_CTL_FLUSH, ctl->flush_bits);
		if (sctl && sctl->flush_bits) {

drivers/video/msm/mdss/mdss_mdp_hwio.h

+3 −0

Original line number	Diff line number	Diff line
		@@ -43,6 +43,9 @@
		#define MMSS_MDP_MDP_SSPP_SPARE_0 0x00028

		#define MMSS_MDP_PANIC_ROBUST_CTRL 0x00178
		#define MMSS_MDP_PANIC_LUT0 0x0017C
		#define MMSS_MDP_PANIC_LUT1 0x00180
		#define MMSS_MDP_ROBUST_LUT 0x00184
		#define MMSS_MDP_RT_NRT_VBIF_CLIENT_SEL 0x00190

		#define MDSS_MDP_REG_VIDEO_INTF_UNDERFLOW_CTL 0x002E0