Loading drivers/net/ethernet/msm/emac/emac.h +5 −2 Original line number Diff line number Diff line Loading @@ -207,8 +207,6 @@ enum emac_adapter_flags { struct emac_hw { void __iomem *reg_addr[NUM_EMAC_REG_BASES]; struct emac_adapter *adpt; u16 devid; u16 revid; Loading Loading @@ -707,6 +705,11 @@ struct emac_adapter { unsigned long flags; }; static inline struct emac_adapter *emac_hw_get_adap(struct emac_hw *hw) { return container_of(hw, struct emac_adapter, hw); } /* default to trying for four seconds */ #define EMAC_TRY_LINK_TIMEOUT (4 * HZ) Loading drivers/net/ethernet/msm/emac/emac_hw.c +50 −48 Original line number Diff line number Diff line Loading @@ -105,7 +105,7 @@ int emac_hw_read_phy_reg(struct emac_hw *hw, bool ext, u8 dev, bool fast, *phy_data = 0; clk_sel = fast ? MDIO_CLK_25_4 : MDIO_CLK_25_28; if (hw->adpt->no_ephy == false) { if (emac_hw_get_adap(hw)->no_ephy == false) { retval = emac_disable_mdio_autopoll(hw); if (retval) return retval; Loading Loading @@ -149,7 +149,7 @@ int emac_hw_read_phy_reg(struct emac_hw *hw, bool ext, u8 dev, bool fast, if (i == MDIO_WAIT_TIMES) retval = -EIO; if (hw->adpt->no_ephy == false) if (emac_hw_get_adap(hw)->no_ephy == false) emac_enable_mdio_autopoll(hw); return retval; Loading @@ -163,7 +163,7 @@ int emac_hw_write_phy_reg(struct emac_hw *hw, bool ext, u8 dev, clk_sel = fast ? MDIO_CLK_25_4 : MDIO_CLK_25_28; if (hw->adpt->no_ephy == false) { if (emac_hw_get_adap(hw)->no_ephy == false) { retval = emac_disable_mdio_autopoll(hw); if (retval) return retval; Loading Loading @@ -206,7 +206,7 @@ int emac_hw_write_phy_reg(struct emac_hw *hw, bool ext, u8 dev, if (i == MDIO_WAIT_TIMES) retval = -EIO; if (hw->adpt->no_ephy == false) if (emac_hw_get_adap(hw)->no_ephy == false) emac_enable_mdio_autopoll(hw); return retval; Loading @@ -215,6 +215,7 @@ int emac_hw_write_phy_reg(struct emac_hw *hw, bool ext, u8 dev, int emac_read_phy_reg(struct emac_hw *hw, u16 phy_addr, u16 reg_addr, u16 *phy_data) { struct emac_adapter *adpt = emac_hw_get_adap(hw); unsigned long flags; int retval; Loading @@ -224,10 +225,10 @@ int emac_read_phy_reg(struct emac_hw *hw, u16 phy_addr, spin_unlock_irqrestore(&hw->mdio_lock, flags); if (retval) emac_err(hw->adpt, "error reading phy reg 0x%02x\n", reg_addr); emac_err(adpt, "error reading phy reg 0x%02x\n", reg_addr); else emac_dbg(hw->adpt, hw, "EMAC PHY RD: 0x%02x -> 0x%04x\n", reg_addr, *phy_data); emac_dbg(adpt, hw, "EMAC PHY RD: 0x%02x -> 0x%04x\n", reg_addr, *phy_data); return retval; } Loading @@ -235,6 +236,7 @@ int emac_read_phy_reg(struct emac_hw *hw, u16 phy_addr, int emac_write_phy_reg(struct emac_hw *hw, u16 phy_addr, u16 reg_addr, u16 phy_data) { struct emac_adapter *adpt = emac_hw_get_adap(hw); unsigned long flags; int retval; Loading @@ -244,10 +246,10 @@ int emac_write_phy_reg(struct emac_hw *hw, u16 phy_addr, spin_unlock_irqrestore(&hw->mdio_lock, flags); if (retval) emac_err(hw->adpt, "error writing phy reg 0x%02x\n", reg_addr); emac_err(adpt, "error writing phy reg 0x%02x\n", reg_addr); else emac_dbg(hw->adpt, hw, "EMAC PHY WR: 0x%02x <- 0x%04x\n", reg_addr, phy_data); emac_dbg(adpt, hw, "EMAC PHY WR: 0x%02x <- 0x%04x\n", reg_addr, phy_data); return retval; } Loading Loading @@ -362,7 +364,7 @@ int emac_hw_init_sgmii(struct emac_hw *hw) } if (i == SERDES_START_WAIT_TIMES) { emac_err(hw->adpt, "serdes failed to start\n"); emac_err(emac_hw_get_adap(hw), "serdes failed to start\n"); return -EIO; } Loading Loading @@ -452,7 +454,7 @@ static int emac_hw_init_rgmii(struct emac_hw *hw) } while (time_after_eq(timeout, jiffies)); if (time_after(jiffies, timeout)) { emac_err(hw->adpt, "PHY PLL lock failed\n"); emac_err(emac_hw_get_adap(hw), "PHY PLL lock failed\n"); return -EIO; } Loading @@ -462,6 +464,7 @@ static int emac_hw_init_rgmii(struct emac_hw *hw) /* initialize phy */ int emac_hw_init_phy(struct emac_hw *hw) { struct emac_adapter *adpt = emac_hw_get_adap(hw); int retval = 0; spin_lock_init(&hw->mdio_lock); Loading @@ -469,9 +472,9 @@ int emac_hw_init_phy(struct emac_hw *hw) hw->autoneg = true; hw->autoneg_advertised = EMAC_LINK_SPEED_DEFAULT; if (hw->adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) if (adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) retval = emac_hw_init_sgmii(hw); else if (hw->adpt->phy_mode == PHY_INTERFACE_MODE_RGMII) else if (adpt->phy_mode == PHY_INTERFACE_MODE_RGMII) retval = emac_hw_init_rgmii(hw); return retval; Loading @@ -483,7 +486,7 @@ int emac_hw_init_ephy(struct emac_hw *hw) u16 val, phy_id[2]; int retval = 0; if (hw->adpt->no_ephy == false) { if (emac_hw_get_adap(hw)->no_ephy == false) { retval = emac_read_phy_reg(hw, hw->phy_addr, MII_PHYSID1, &phy_id[0]); if (retval) Loading @@ -500,7 +503,7 @@ int emac_hw_init_ephy(struct emac_hw *hw) } /* disable hibernation in case of rgmii phy */ if (hw->adpt->phy_mode == PHY_INTERFACE_MODE_RGMII) { if (emac_hw_get_adap(hw)->phy_mode == PHY_INTERFACE_MODE_RGMII) { retval = emac_write_phy_reg(hw, hw->phy_addr, MII_DBG_ADDR, HIBERNATE_CTRL_REG); if (retval) Loading Loading @@ -636,10 +639,11 @@ static int emac_hw_setup_phy_link(struct emac_hw *hw, u32 speed, bool autoneg, int emac_setup_phy_link(struct emac_hw *hw, u32 speed, bool autoneg, bool fc) { struct emac_adapter *adpt = emac_hw_get_adap(hw); int retval = 0; if (hw->adpt->no_ephy == true) { if (hw->adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) { if (adpt->no_ephy == true) { if (adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) { hw->autoneg = autoneg; hw->autoneg_advertised = speed; /* The AN_ENABLE and SPEED_CFG can't change on fly. Loading @@ -647,14 +651,13 @@ int emac_setup_phy_link(struct emac_hw *hw, u32 speed, bool autoneg, bool fc) */ return emac_hw_reset_sgmii(hw); } else { emac_err(hw->adpt, "can't setup phy link without ephy\n"); emac_err(adpt, "can't setup phy link without ephy\n"); return -ENOTSUPP; } } if (emac_hw_setup_phy_link(hw, speed, autoneg, fc)) { emac_err(hw->adpt, "error when init phy speed and fc\n"); emac_err(adpt, "error when init phy speed and fc\n"); retval = -EINVAL; } else { hw->autoneg = autoneg; Loading @@ -673,15 +676,15 @@ int emac_setup_phy_link_speed(struct emac_hw *hw, u32 speed, int emac_check_phy_link(struct emac_hw *hw, u32 *speed, bool *link_up) { struct emac_adapter *adpt = emac_hw_get_adap(hw); u16 bmsr, pssr; int retval; if (hw->adpt->no_ephy == true) { if (hw->adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) { if (adpt->no_ephy == true) { if (adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) { return emac_check_sgmii_link(hw, speed, link_up); } else { emac_err(hw->adpt, "can't check phy link without ephy\n"); emac_err(adpt, "can't check phy link without ephy\n"); return -ENOTSUPP; } } Loading @@ -701,7 +704,7 @@ int emac_check_phy_link(struct emac_hw *hw, u32 *speed, bool *link_up) return retval; if (!(pssr & PSSR_SPD_DPLX_RESOLVED)) { emac_err(hw->adpt, "error for speed duplex resolved\n"); emac_err(adpt, "error for speed duplex resolved\n"); return -EINVAL; } Loading @@ -710,7 +713,7 @@ int emac_check_phy_link(struct emac_hw *hw, u32 *speed, bool *link_up) if (pssr & PSSR_DPLX) *speed = EMAC_LINK_SPEED_1GB_FULL; else emac_err(hw->adpt, "1000M half duplex is invalid"); emac_err(adpt, "1000M half duplex is invalid"); break; case PSSR_100MBS: if (pssr & PSSR_DPLX) Loading @@ -735,16 +738,16 @@ int emac_check_phy_link(struct emac_hw *hw, u32 *speed, bool *link_up) int emac_hw_get_lpa_speed(struct emac_hw *hw, u32 *speed) { struct emac_adapter *adpt = emac_hw_get_adap(hw); int retval; u16 lpa, stat1000; bool link; if (hw->adpt->no_ephy == true) { if (hw->adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) { if (adpt->no_ephy == true) { if (adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) { return emac_check_sgmii_link(hw, speed, &link); } else { emac_err(hw->adpt, "can't get lpa speed without ephy\n"); emac_err(adpt, "can't get lpa speed without ephy\n"); return -ENOTSUPP; } } Loading Loading @@ -792,7 +795,7 @@ int emac_hw_clear_sgmii_intr_status(struct emac_hw *hw, u32 irq_bits) break; } if (status & irq_bits) { emac_err(hw->adpt, emac_err(emac_hw_get_adap(hw), "failed to clear SGMII irq: status 0x%x bits 0x%x\n", status, irq_bits); return -EIO; Loading Loading @@ -883,7 +886,7 @@ int emac_check_sgmii_autoneg(struct emac_hw *hw, u32 *speed, bool *link_up) /* INTR */ void emac_hw_enable_intr(struct emac_hw *hw) { struct emac_adapter *adpt = hw->adpt; struct emac_adapter *adpt = emac_hw_get_adap(hw); struct emac_irq_info *irq_info; int i; Loading @@ -907,7 +910,7 @@ void emac_hw_enable_intr(struct emac_hw *hw) void emac_hw_disable_intr(struct emac_hw *hw) { struct emac_adapter *adpt = hw->adpt; struct emac_adapter *adpt = emac_hw_get_adap(hw); struct emac_irq_info *irq_info; int i; Loading Loading @@ -1107,7 +1110,7 @@ void emac_hw_config_pow_save(struct emac_hw *hw, u32 speed, /* Config descriptor rings */ static void emac_hw_config_ring_ctrl(struct emac_hw *hw) { struct emac_adapter *adpt = hw->adpt; struct emac_adapter *adpt = emac_hw_get_adap(hw); if (adpt->tstamp_en) { emac_reg_update32(hw, EMAC_CSR, EMAC_EMAC_WRAPPER_CSR1, Loading @@ -1132,7 +1135,7 @@ static void emac_hw_config_ring_ctrl(struct emac_hw *hw) EMAC_DMA_ADDR_LO(adpt->tx_queue[0].tpd.tpdma)); break; default: emac_err(hw->adpt, "Invalid number of TX queues (%d)\n", emac_err(adpt, "Invalid number of TX queues (%d)\n", adpt->num_txques); return; } Loading Loading @@ -1165,7 +1168,7 @@ static void emac_hw_config_ring_ctrl(struct emac_hw *hw) EMAC_DMA_ADDR_LO(adpt->rx_queue[0].rrd.rrdma)); break; default: emac_err(hw->adpt, "Invalid number of RX queues (%d)\n", emac_err(adpt, "Invalid number of RX queues (%d)\n", adpt->num_rxques); return; } Loading Loading @@ -1275,6 +1278,7 @@ static void emac_hw_config_dma_ctrl(struct emac_hw *hw) /* Flow Control (fc) */ static int emac_get_fc_mode(struct emac_hw *hw, enum emac_fc_mode *mode) { struct emac_adapter *adpt = emac_hw_get_adap(hw); u16 i, bmsr = 0, pssr = 0; int retval = 0; Loading @@ -1290,7 +1294,7 @@ static int emac_get_fc_mode(struct emac_hw *hw, enum emac_fc_mode *mode) return retval; if (!(pssr & PSSR_SPD_DPLX_RESOLVED)) { emac_err(hw->adpt, emac_err(adpt, "error for speed duplex resolved\n"); return -EINVAL; } Loading @@ -1312,7 +1316,7 @@ static int emac_get_fc_mode(struct emac_hw *hw, enum emac_fc_mode *mode) } if (i == EMAC_MAX_SETUP_LNK_CYCLE) { emac_err(hw->adpt, "error when get flow control mode\n"); emac_err(adpt, "error when get flow control mode\n"); retval = -EINVAL; } Loading @@ -1321,10 +1325,11 @@ static int emac_get_fc_mode(struct emac_hw *hw, enum emac_fc_mode *mode) int emac_hw_config_fc(struct emac_hw *hw) { struct emac_adapter *adpt = emac_hw_get_adap(hw); u32 mac; int retval; if (hw->disable_fc_autoneg || hw->adpt->no_ephy) { if (hw->disable_fc_autoneg || adpt->no_ephy) { hw->cur_fc_mode = hw->req_fc_mode; } else { retval = emac_get_fc_mode(hw, &hw->cur_fc_mode); Loading @@ -1351,7 +1356,7 @@ int emac_hw_config_fc(struct emac_hw *hw) mac |= (TXFC | RXFC); break; default: emac_err(hw->adpt, "flow control param set incorrectly\n"); emac_err(adpt, "flow control param set incorrectly\n"); return -EINVAL; } Loading Loading @@ -1408,19 +1413,16 @@ void emac_hw_reset_mac(struct emac_hw *hw) /* Start MAC */ void emac_hw_start_mac(struct emac_hw *hw) { struct emac_adapter *adpt = emac_hw_get_adap(hw); u32 mac, csr1; /* enable tx queue */ if (hw->adpt->num_txques && (hw->adpt->num_txques <= EMAC_MAX_TX_QUEUES)) { if (adpt->num_txques && (adpt->num_txques <= EMAC_MAX_TX_QUEUES)) emac_reg_update32(hw, EMAC, EMAC_TXQ_CTRL_0, 0, TXQ_EN); } /* enable rx queue */ if (hw->adpt->num_rxques && (hw->adpt->num_rxques <= EMAC_MAX_RX_QUEUES)) { if (adpt->num_rxques && (adpt->num_rxques <= EMAC_MAX_RX_QUEUES)) emac_reg_update32(hw, EMAC, EMAC_RXQ_CTRL_0, 0, RXQ_EN); } /* enable mac control */ mac = emac_reg_r32(hw, EMAC, EMAC_MAC_CTRL); Loading drivers/net/ethernet/msm/emac/emac_main.c +0 −1 Original line number Diff line number Diff line Loading @@ -2726,7 +2726,6 @@ static int emac_probe(struct platform_device *pdev) adpt = netdev_priv(netdev); adpt->netdev = netdev; hw = &adpt->hw; hw->adpt = adpt; adpt->msg_enable = netif_msg_init(msm_emac_msglvl, EMAC_MSG_DEFAULT); adpt->dma_mask = DMA_BIT_MASK(32); Loading drivers/net/ethernet/msm/emac/emac_ptp.c +10 −7 Original line number Diff line number Diff line Loading @@ -51,7 +51,7 @@ static const struct emac_tstamp_hw_delay emac_ptp_hw_delay[] = { static inline u32 get_rtc_ref_clkrate(struct emac_hw *hw) { struct emac_adapter *adpt = hw->adpt; struct emac_adapter *adpt = emac_hw_get_adap(hw); struct emac_clk_info *clk_info = &adpt->clk_info[EMAC_125M_CLK]; return clk_get_rate(clk_info->clk); Loading Loading @@ -154,7 +154,8 @@ static int emac_hw_adjust_tstamp_offset(struct emac_hw *hw, { const struct emac_tstamp_hw_delay *delay_info; delay_info = emac_get_ptp_hw_delay(link_speed, hw->adpt->phy_mode); delay_info = emac_get_ptp_hw_delay(link_speed, emac_hw_get_adap(hw)->phy_mode); if (clk_mode == emac_ptp_clk_mode_oc_one_step) { u32 latency = (delay_info) ? delay_info->tx : 0; Loading Loading @@ -247,7 +248,8 @@ static int emac_hw_1588_core_enable(struct emac_hw *hw, { if ((clk_mode != emac_ptp_clk_mode_oc_one_step) && (clk_mode != emac_ptp_clk_mode_oc_two_step)) { emac_dbg(hw->adpt, hw, "invalid ptp clk mode %d\n", clk_mode); emac_dbg(emac_hw_get_adap(hw), hw, "invalid ptp clk mode %d\n", clk_mode); return -EINVAL; } Loading Loading @@ -378,7 +380,7 @@ static void rtc_ns_sync_pps_in(struct emac_hw *hw) if (delta) { rtc_adjtime(hw, delta); emac_dbg(hw->adpt, intr, emac_dbg(emac_hw_get_adap(hw), intr, "RTC_SYNC: gm_pps_tstamp_ns 0x%08x, adjust %lldns\n", ts, delta); } Loading Loading @@ -416,7 +418,7 @@ int emac_ptp_config(struct emac_hw *hw) getnstimeofday(&ts); rtc_settime(hw, &ts); hw->adpt->irq_info[0].mask |= PTP_INT; emac_hw_get_adap(hw)->irq_info[0].mask |= PTP_INT; hw->ptp_intr_mask = PPS_IN; unlock_out: Loading @@ -436,7 +438,7 @@ int emac_ptp_stop(struct emac_hw *hw) ret = emac_hw_1588_core_disable(hw); hw->ptp_intr_mask = 0; hw->adpt->irq_info[0].mask &= ~PTP_INT; emac_hw_get_adap(hw)->irq_info[0].mask &= ~PTP_INT; spin_unlock_irqrestore(&hw->ptp_lock, flag); Loading Loading @@ -464,7 +466,8 @@ void emac_ptp_intr(struct emac_hw *hw) isr = emac_reg_r32(hw, EMAC_1588, EMAC_P1588_PTP_EXPANDED_INT_STATUS); status = isr & hw->ptp_intr_mask; emac_dbg(hw->adpt, intr, "receive ptp interrupt: isr 0x%x\n", isr); emac_dbg(emac_hw_get_adap(hw), intr, "receive ptp interrupt: isr 0x%x\n", isr); if (status & PPS_IN) emac_ptp_rtc_ns_sync(hw); Loading Loading
drivers/net/ethernet/msm/emac/emac.h +5 −2 Original line number Diff line number Diff line Loading @@ -207,8 +207,6 @@ enum emac_adapter_flags { struct emac_hw { void __iomem *reg_addr[NUM_EMAC_REG_BASES]; struct emac_adapter *adpt; u16 devid; u16 revid; Loading Loading @@ -707,6 +705,11 @@ struct emac_adapter { unsigned long flags; }; static inline struct emac_adapter *emac_hw_get_adap(struct emac_hw *hw) { return container_of(hw, struct emac_adapter, hw); } /* default to trying for four seconds */ #define EMAC_TRY_LINK_TIMEOUT (4 * HZ) Loading
drivers/net/ethernet/msm/emac/emac_hw.c +50 −48 Original line number Diff line number Diff line Loading @@ -105,7 +105,7 @@ int emac_hw_read_phy_reg(struct emac_hw *hw, bool ext, u8 dev, bool fast, *phy_data = 0; clk_sel = fast ? MDIO_CLK_25_4 : MDIO_CLK_25_28; if (hw->adpt->no_ephy == false) { if (emac_hw_get_adap(hw)->no_ephy == false) { retval = emac_disable_mdio_autopoll(hw); if (retval) return retval; Loading Loading @@ -149,7 +149,7 @@ int emac_hw_read_phy_reg(struct emac_hw *hw, bool ext, u8 dev, bool fast, if (i == MDIO_WAIT_TIMES) retval = -EIO; if (hw->adpt->no_ephy == false) if (emac_hw_get_adap(hw)->no_ephy == false) emac_enable_mdio_autopoll(hw); return retval; Loading @@ -163,7 +163,7 @@ int emac_hw_write_phy_reg(struct emac_hw *hw, bool ext, u8 dev, clk_sel = fast ? MDIO_CLK_25_4 : MDIO_CLK_25_28; if (hw->adpt->no_ephy == false) { if (emac_hw_get_adap(hw)->no_ephy == false) { retval = emac_disable_mdio_autopoll(hw); if (retval) return retval; Loading Loading @@ -206,7 +206,7 @@ int emac_hw_write_phy_reg(struct emac_hw *hw, bool ext, u8 dev, if (i == MDIO_WAIT_TIMES) retval = -EIO; if (hw->adpt->no_ephy == false) if (emac_hw_get_adap(hw)->no_ephy == false) emac_enable_mdio_autopoll(hw); return retval; Loading @@ -215,6 +215,7 @@ int emac_hw_write_phy_reg(struct emac_hw *hw, bool ext, u8 dev, int emac_read_phy_reg(struct emac_hw *hw, u16 phy_addr, u16 reg_addr, u16 *phy_data) { struct emac_adapter *adpt = emac_hw_get_adap(hw); unsigned long flags; int retval; Loading @@ -224,10 +225,10 @@ int emac_read_phy_reg(struct emac_hw *hw, u16 phy_addr, spin_unlock_irqrestore(&hw->mdio_lock, flags); if (retval) emac_err(hw->adpt, "error reading phy reg 0x%02x\n", reg_addr); emac_err(adpt, "error reading phy reg 0x%02x\n", reg_addr); else emac_dbg(hw->adpt, hw, "EMAC PHY RD: 0x%02x -> 0x%04x\n", reg_addr, *phy_data); emac_dbg(adpt, hw, "EMAC PHY RD: 0x%02x -> 0x%04x\n", reg_addr, *phy_data); return retval; } Loading @@ -235,6 +236,7 @@ int emac_read_phy_reg(struct emac_hw *hw, u16 phy_addr, int emac_write_phy_reg(struct emac_hw *hw, u16 phy_addr, u16 reg_addr, u16 phy_data) { struct emac_adapter *adpt = emac_hw_get_adap(hw); unsigned long flags; int retval; Loading @@ -244,10 +246,10 @@ int emac_write_phy_reg(struct emac_hw *hw, u16 phy_addr, spin_unlock_irqrestore(&hw->mdio_lock, flags); if (retval) emac_err(hw->adpt, "error writing phy reg 0x%02x\n", reg_addr); emac_err(adpt, "error writing phy reg 0x%02x\n", reg_addr); else emac_dbg(hw->adpt, hw, "EMAC PHY WR: 0x%02x <- 0x%04x\n", reg_addr, phy_data); emac_dbg(adpt, hw, "EMAC PHY WR: 0x%02x <- 0x%04x\n", reg_addr, phy_data); return retval; } Loading Loading @@ -362,7 +364,7 @@ int emac_hw_init_sgmii(struct emac_hw *hw) } if (i == SERDES_START_WAIT_TIMES) { emac_err(hw->adpt, "serdes failed to start\n"); emac_err(emac_hw_get_adap(hw), "serdes failed to start\n"); return -EIO; } Loading Loading @@ -452,7 +454,7 @@ static int emac_hw_init_rgmii(struct emac_hw *hw) } while (time_after_eq(timeout, jiffies)); if (time_after(jiffies, timeout)) { emac_err(hw->adpt, "PHY PLL lock failed\n"); emac_err(emac_hw_get_adap(hw), "PHY PLL lock failed\n"); return -EIO; } Loading @@ -462,6 +464,7 @@ static int emac_hw_init_rgmii(struct emac_hw *hw) /* initialize phy */ int emac_hw_init_phy(struct emac_hw *hw) { struct emac_adapter *adpt = emac_hw_get_adap(hw); int retval = 0; spin_lock_init(&hw->mdio_lock); Loading @@ -469,9 +472,9 @@ int emac_hw_init_phy(struct emac_hw *hw) hw->autoneg = true; hw->autoneg_advertised = EMAC_LINK_SPEED_DEFAULT; if (hw->adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) if (adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) retval = emac_hw_init_sgmii(hw); else if (hw->adpt->phy_mode == PHY_INTERFACE_MODE_RGMII) else if (adpt->phy_mode == PHY_INTERFACE_MODE_RGMII) retval = emac_hw_init_rgmii(hw); return retval; Loading @@ -483,7 +486,7 @@ int emac_hw_init_ephy(struct emac_hw *hw) u16 val, phy_id[2]; int retval = 0; if (hw->adpt->no_ephy == false) { if (emac_hw_get_adap(hw)->no_ephy == false) { retval = emac_read_phy_reg(hw, hw->phy_addr, MII_PHYSID1, &phy_id[0]); if (retval) Loading @@ -500,7 +503,7 @@ int emac_hw_init_ephy(struct emac_hw *hw) } /* disable hibernation in case of rgmii phy */ if (hw->adpt->phy_mode == PHY_INTERFACE_MODE_RGMII) { if (emac_hw_get_adap(hw)->phy_mode == PHY_INTERFACE_MODE_RGMII) { retval = emac_write_phy_reg(hw, hw->phy_addr, MII_DBG_ADDR, HIBERNATE_CTRL_REG); if (retval) Loading Loading @@ -636,10 +639,11 @@ static int emac_hw_setup_phy_link(struct emac_hw *hw, u32 speed, bool autoneg, int emac_setup_phy_link(struct emac_hw *hw, u32 speed, bool autoneg, bool fc) { struct emac_adapter *adpt = emac_hw_get_adap(hw); int retval = 0; if (hw->adpt->no_ephy == true) { if (hw->adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) { if (adpt->no_ephy == true) { if (adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) { hw->autoneg = autoneg; hw->autoneg_advertised = speed; /* The AN_ENABLE and SPEED_CFG can't change on fly. Loading @@ -647,14 +651,13 @@ int emac_setup_phy_link(struct emac_hw *hw, u32 speed, bool autoneg, bool fc) */ return emac_hw_reset_sgmii(hw); } else { emac_err(hw->adpt, "can't setup phy link without ephy\n"); emac_err(adpt, "can't setup phy link without ephy\n"); return -ENOTSUPP; } } if (emac_hw_setup_phy_link(hw, speed, autoneg, fc)) { emac_err(hw->adpt, "error when init phy speed and fc\n"); emac_err(adpt, "error when init phy speed and fc\n"); retval = -EINVAL; } else { hw->autoneg = autoneg; Loading @@ -673,15 +676,15 @@ int emac_setup_phy_link_speed(struct emac_hw *hw, u32 speed, int emac_check_phy_link(struct emac_hw *hw, u32 *speed, bool *link_up) { struct emac_adapter *adpt = emac_hw_get_adap(hw); u16 bmsr, pssr; int retval; if (hw->adpt->no_ephy == true) { if (hw->adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) { if (adpt->no_ephy == true) { if (adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) { return emac_check_sgmii_link(hw, speed, link_up); } else { emac_err(hw->adpt, "can't check phy link without ephy\n"); emac_err(adpt, "can't check phy link without ephy\n"); return -ENOTSUPP; } } Loading @@ -701,7 +704,7 @@ int emac_check_phy_link(struct emac_hw *hw, u32 *speed, bool *link_up) return retval; if (!(pssr & PSSR_SPD_DPLX_RESOLVED)) { emac_err(hw->adpt, "error for speed duplex resolved\n"); emac_err(adpt, "error for speed duplex resolved\n"); return -EINVAL; } Loading @@ -710,7 +713,7 @@ int emac_check_phy_link(struct emac_hw *hw, u32 *speed, bool *link_up) if (pssr & PSSR_DPLX) *speed = EMAC_LINK_SPEED_1GB_FULL; else emac_err(hw->adpt, "1000M half duplex is invalid"); emac_err(adpt, "1000M half duplex is invalid"); break; case PSSR_100MBS: if (pssr & PSSR_DPLX) Loading @@ -735,16 +738,16 @@ int emac_check_phy_link(struct emac_hw *hw, u32 *speed, bool *link_up) int emac_hw_get_lpa_speed(struct emac_hw *hw, u32 *speed) { struct emac_adapter *adpt = emac_hw_get_adap(hw); int retval; u16 lpa, stat1000; bool link; if (hw->adpt->no_ephy == true) { if (hw->adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) { if (adpt->no_ephy == true) { if (adpt->phy_mode == PHY_INTERFACE_MODE_SGMII) { return emac_check_sgmii_link(hw, speed, &link); } else { emac_err(hw->adpt, "can't get lpa speed without ephy\n"); emac_err(adpt, "can't get lpa speed without ephy\n"); return -ENOTSUPP; } } Loading Loading @@ -792,7 +795,7 @@ int emac_hw_clear_sgmii_intr_status(struct emac_hw *hw, u32 irq_bits) break; } if (status & irq_bits) { emac_err(hw->adpt, emac_err(emac_hw_get_adap(hw), "failed to clear SGMII irq: status 0x%x bits 0x%x\n", status, irq_bits); return -EIO; Loading Loading @@ -883,7 +886,7 @@ int emac_check_sgmii_autoneg(struct emac_hw *hw, u32 *speed, bool *link_up) /* INTR */ void emac_hw_enable_intr(struct emac_hw *hw) { struct emac_adapter *adpt = hw->adpt; struct emac_adapter *adpt = emac_hw_get_adap(hw); struct emac_irq_info *irq_info; int i; Loading @@ -907,7 +910,7 @@ void emac_hw_enable_intr(struct emac_hw *hw) void emac_hw_disable_intr(struct emac_hw *hw) { struct emac_adapter *adpt = hw->adpt; struct emac_adapter *adpt = emac_hw_get_adap(hw); struct emac_irq_info *irq_info; int i; Loading Loading @@ -1107,7 +1110,7 @@ void emac_hw_config_pow_save(struct emac_hw *hw, u32 speed, /* Config descriptor rings */ static void emac_hw_config_ring_ctrl(struct emac_hw *hw) { struct emac_adapter *adpt = hw->adpt; struct emac_adapter *adpt = emac_hw_get_adap(hw); if (adpt->tstamp_en) { emac_reg_update32(hw, EMAC_CSR, EMAC_EMAC_WRAPPER_CSR1, Loading @@ -1132,7 +1135,7 @@ static void emac_hw_config_ring_ctrl(struct emac_hw *hw) EMAC_DMA_ADDR_LO(adpt->tx_queue[0].tpd.tpdma)); break; default: emac_err(hw->adpt, "Invalid number of TX queues (%d)\n", emac_err(adpt, "Invalid number of TX queues (%d)\n", adpt->num_txques); return; } Loading Loading @@ -1165,7 +1168,7 @@ static void emac_hw_config_ring_ctrl(struct emac_hw *hw) EMAC_DMA_ADDR_LO(adpt->rx_queue[0].rrd.rrdma)); break; default: emac_err(hw->adpt, "Invalid number of RX queues (%d)\n", emac_err(adpt, "Invalid number of RX queues (%d)\n", adpt->num_rxques); return; } Loading Loading @@ -1275,6 +1278,7 @@ static void emac_hw_config_dma_ctrl(struct emac_hw *hw) /* Flow Control (fc) */ static int emac_get_fc_mode(struct emac_hw *hw, enum emac_fc_mode *mode) { struct emac_adapter *adpt = emac_hw_get_adap(hw); u16 i, bmsr = 0, pssr = 0; int retval = 0; Loading @@ -1290,7 +1294,7 @@ static int emac_get_fc_mode(struct emac_hw *hw, enum emac_fc_mode *mode) return retval; if (!(pssr & PSSR_SPD_DPLX_RESOLVED)) { emac_err(hw->adpt, emac_err(adpt, "error for speed duplex resolved\n"); return -EINVAL; } Loading @@ -1312,7 +1316,7 @@ static int emac_get_fc_mode(struct emac_hw *hw, enum emac_fc_mode *mode) } if (i == EMAC_MAX_SETUP_LNK_CYCLE) { emac_err(hw->adpt, "error when get flow control mode\n"); emac_err(adpt, "error when get flow control mode\n"); retval = -EINVAL; } Loading @@ -1321,10 +1325,11 @@ static int emac_get_fc_mode(struct emac_hw *hw, enum emac_fc_mode *mode) int emac_hw_config_fc(struct emac_hw *hw) { struct emac_adapter *adpt = emac_hw_get_adap(hw); u32 mac; int retval; if (hw->disable_fc_autoneg || hw->adpt->no_ephy) { if (hw->disable_fc_autoneg || adpt->no_ephy) { hw->cur_fc_mode = hw->req_fc_mode; } else { retval = emac_get_fc_mode(hw, &hw->cur_fc_mode); Loading @@ -1351,7 +1356,7 @@ int emac_hw_config_fc(struct emac_hw *hw) mac |= (TXFC | RXFC); break; default: emac_err(hw->adpt, "flow control param set incorrectly\n"); emac_err(adpt, "flow control param set incorrectly\n"); return -EINVAL; } Loading Loading @@ -1408,19 +1413,16 @@ void emac_hw_reset_mac(struct emac_hw *hw) /* Start MAC */ void emac_hw_start_mac(struct emac_hw *hw) { struct emac_adapter *adpt = emac_hw_get_adap(hw); u32 mac, csr1; /* enable tx queue */ if (hw->adpt->num_txques && (hw->adpt->num_txques <= EMAC_MAX_TX_QUEUES)) { if (adpt->num_txques && (adpt->num_txques <= EMAC_MAX_TX_QUEUES)) emac_reg_update32(hw, EMAC, EMAC_TXQ_CTRL_0, 0, TXQ_EN); } /* enable rx queue */ if (hw->adpt->num_rxques && (hw->adpt->num_rxques <= EMAC_MAX_RX_QUEUES)) { if (adpt->num_rxques && (adpt->num_rxques <= EMAC_MAX_RX_QUEUES)) emac_reg_update32(hw, EMAC, EMAC_RXQ_CTRL_0, 0, RXQ_EN); } /* enable mac control */ mac = emac_reg_r32(hw, EMAC, EMAC_MAC_CTRL); Loading
drivers/net/ethernet/msm/emac/emac_main.c +0 −1 Original line number Diff line number Diff line Loading @@ -2726,7 +2726,6 @@ static int emac_probe(struct platform_device *pdev) adpt = netdev_priv(netdev); adpt->netdev = netdev; hw = &adpt->hw; hw->adpt = adpt; adpt->msg_enable = netif_msg_init(msm_emac_msglvl, EMAC_MSG_DEFAULT); adpt->dma_mask = DMA_BIT_MASK(32); Loading
drivers/net/ethernet/msm/emac/emac_ptp.c +10 −7 Original line number Diff line number Diff line Loading @@ -51,7 +51,7 @@ static const struct emac_tstamp_hw_delay emac_ptp_hw_delay[] = { static inline u32 get_rtc_ref_clkrate(struct emac_hw *hw) { struct emac_adapter *adpt = hw->adpt; struct emac_adapter *adpt = emac_hw_get_adap(hw); struct emac_clk_info *clk_info = &adpt->clk_info[EMAC_125M_CLK]; return clk_get_rate(clk_info->clk); Loading Loading @@ -154,7 +154,8 @@ static int emac_hw_adjust_tstamp_offset(struct emac_hw *hw, { const struct emac_tstamp_hw_delay *delay_info; delay_info = emac_get_ptp_hw_delay(link_speed, hw->adpt->phy_mode); delay_info = emac_get_ptp_hw_delay(link_speed, emac_hw_get_adap(hw)->phy_mode); if (clk_mode == emac_ptp_clk_mode_oc_one_step) { u32 latency = (delay_info) ? delay_info->tx : 0; Loading Loading @@ -247,7 +248,8 @@ static int emac_hw_1588_core_enable(struct emac_hw *hw, { if ((clk_mode != emac_ptp_clk_mode_oc_one_step) && (clk_mode != emac_ptp_clk_mode_oc_two_step)) { emac_dbg(hw->adpt, hw, "invalid ptp clk mode %d\n", clk_mode); emac_dbg(emac_hw_get_adap(hw), hw, "invalid ptp clk mode %d\n", clk_mode); return -EINVAL; } Loading Loading @@ -378,7 +380,7 @@ static void rtc_ns_sync_pps_in(struct emac_hw *hw) if (delta) { rtc_adjtime(hw, delta); emac_dbg(hw->adpt, intr, emac_dbg(emac_hw_get_adap(hw), intr, "RTC_SYNC: gm_pps_tstamp_ns 0x%08x, adjust %lldns\n", ts, delta); } Loading Loading @@ -416,7 +418,7 @@ int emac_ptp_config(struct emac_hw *hw) getnstimeofday(&ts); rtc_settime(hw, &ts); hw->adpt->irq_info[0].mask |= PTP_INT; emac_hw_get_adap(hw)->irq_info[0].mask |= PTP_INT; hw->ptp_intr_mask = PPS_IN; unlock_out: Loading @@ -436,7 +438,7 @@ int emac_ptp_stop(struct emac_hw *hw) ret = emac_hw_1588_core_disable(hw); hw->ptp_intr_mask = 0; hw->adpt->irq_info[0].mask &= ~PTP_INT; emac_hw_get_adap(hw)->irq_info[0].mask &= ~PTP_INT; spin_unlock_irqrestore(&hw->ptp_lock, flag); Loading Loading @@ -464,7 +466,8 @@ void emac_ptp_intr(struct emac_hw *hw) isr = emac_reg_r32(hw, EMAC_1588, EMAC_P1588_PTP_EXPANDED_INT_STATUS); status = isr & hw->ptp_intr_mask; emac_dbg(hw->adpt, intr, "receive ptp interrupt: isr 0x%x\n", isr); emac_dbg(emac_hw_get_adap(hw), intr, "receive ptp interrupt: isr 0x%x\n", isr); if (status & PPS_IN) emac_ptp_rtc_ns_sync(hw); Loading