Loading drivers/gpu/msm/kgsl_iommu.c +14 −0 Original line number Diff line number Diff line Loading @@ -477,6 +477,8 @@ static void kgsl_iommu_disable_clk(struct kgsl_mmu *mmu, int ctx_id) */ iommu_drvdata = dev_get_drvdata( iommu_unit->dev[j].dev->parent); if (iommu->gtcu_iface_clk) clk_disable_unprepare(iommu->gtcu_iface_clk); if (iommu_drvdata->aclk) clk_disable_unprepare(iommu_drvdata->aclk); if (iommu_drvdata->clk) Loading Loading @@ -593,6 +595,11 @@ static int kgsl_iommu_enable_clk(struct kgsl_mmu *mmu, goto done; } } if (iommu->gtcu_iface_clk) { ret = clk_prepare_enable(iommu->gtcu_iface_clk); if (ret) goto done; } atomic_inc(&iommu_unit->dev[j].clk_enable_count); } } Loading Loading @@ -1359,6 +1366,8 @@ static int kgsl_iommu_init(struct kgsl_mmu *mmu) */ int status = 0; struct kgsl_iommu *iommu; struct platform_device *pdev = container_of(mmu->device->parentdev, struct platform_device, dev); atomic_set(&mmu->fault, 0); iommu = kzalloc(sizeof(struct kgsl_iommu), GFP_KERNEL); Loading @@ -1382,6 +1391,11 @@ static int kgsl_iommu_init(struct kgsl_mmu *mmu) (msm_soc_version_supports_iommu_v0() || iommu->iommu_units[0].iommu_halt_enable); if (mmu->pt_per_process && of_property_match_string(pdev->dev.of_node, "clock-names", "gtcu_iface_clk") >= 0) iommu->gtcu_iface_clk = clk_get(&pdev->dev, "gtcu_iface_clk"); /* * For IOMMU per-process pagetables, the allocatable range * and the kernel global range must both be outside Loading drivers/gpu/msm/kgsl_iommu.h +2 −0 Original line number Diff line number Diff line Loading @@ -221,6 +221,7 @@ struct kgsl_iommu_unit { * @sync_lock_offset - The page offset within a page at which the sync * variables are located * @sync_lock_initialized: True if the sync_lock feature is enabled * @gtcu_iface_clk: The gTCU AHB Clock connected to SMMU */ struct kgsl_iommu { struct kgsl_iommu_unit iommu_units[KGSL_IOMMU_MAX_UNITS]; Loading @@ -233,6 +234,7 @@ struct kgsl_iommu { struct kgsl_memdesc sync_lock_desc; unsigned int sync_lock_offset; bool sync_lock_initialized; struct clk *gtcu_iface_clk; }; /* Loading Loading
drivers/gpu/msm/kgsl_iommu.c +14 −0 Original line number Diff line number Diff line Loading @@ -477,6 +477,8 @@ static void kgsl_iommu_disable_clk(struct kgsl_mmu *mmu, int ctx_id) */ iommu_drvdata = dev_get_drvdata( iommu_unit->dev[j].dev->parent); if (iommu->gtcu_iface_clk) clk_disable_unprepare(iommu->gtcu_iface_clk); if (iommu_drvdata->aclk) clk_disable_unprepare(iommu_drvdata->aclk); if (iommu_drvdata->clk) Loading Loading @@ -593,6 +595,11 @@ static int kgsl_iommu_enable_clk(struct kgsl_mmu *mmu, goto done; } } if (iommu->gtcu_iface_clk) { ret = clk_prepare_enable(iommu->gtcu_iface_clk); if (ret) goto done; } atomic_inc(&iommu_unit->dev[j].clk_enable_count); } } Loading Loading @@ -1359,6 +1366,8 @@ static int kgsl_iommu_init(struct kgsl_mmu *mmu) */ int status = 0; struct kgsl_iommu *iommu; struct platform_device *pdev = container_of(mmu->device->parentdev, struct platform_device, dev); atomic_set(&mmu->fault, 0); iommu = kzalloc(sizeof(struct kgsl_iommu), GFP_KERNEL); Loading @@ -1382,6 +1391,11 @@ static int kgsl_iommu_init(struct kgsl_mmu *mmu) (msm_soc_version_supports_iommu_v0() || iommu->iommu_units[0].iommu_halt_enable); if (mmu->pt_per_process && of_property_match_string(pdev->dev.of_node, "clock-names", "gtcu_iface_clk") >= 0) iommu->gtcu_iface_clk = clk_get(&pdev->dev, "gtcu_iface_clk"); /* * For IOMMU per-process pagetables, the allocatable range * and the kernel global range must both be outside Loading
drivers/gpu/msm/kgsl_iommu.h +2 −0 Original line number Diff line number Diff line Loading @@ -221,6 +221,7 @@ struct kgsl_iommu_unit { * @sync_lock_offset - The page offset within a page at which the sync * variables are located * @sync_lock_initialized: True if the sync_lock feature is enabled * @gtcu_iface_clk: The gTCU AHB Clock connected to SMMU */ struct kgsl_iommu { struct kgsl_iommu_unit iommu_units[KGSL_IOMMU_MAX_UNITS]; Loading @@ -233,6 +234,7 @@ struct kgsl_iommu { struct kgsl_memdesc sync_lock_desc; unsigned int sync_lock_offset; bool sync_lock_initialized; struct clk *gtcu_iface_clk; }; /* Loading