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Commit 7f01b853 authored by Xiaogang Cui's avatar Xiaogang Cui Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add coresight byte counter interrupt for msmtellurium 



Add device tree entry to support CoreSight byte counter interrupt
feature which raises an interrupt on transfer of programmed
number of bytes to ETR-memory.

Change-Id: Ia76e2cc437352f2f762824da579917d3585ad5d7
Signed-off-by: default avatarXiaogang Cui <xiaogang@codeaurora.org>
parent 6c644c0f
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