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Commit 7b603144 authored Nov 03, 2014 by Anantha Krishnan

ARM: dts: msm: Add BT sleep clock configuration



Bluetooth requires external 32KHz sleep clock from PMD9635 in order
to operate at lower frequency clock thereby saving power during idle
scenarios.

CRs-Fixed: 749512
Change-Id: I363db15117404706007061c3e5b835f81d469c67
Signed-off-by: Anantha Krishnan <ananthk@codeaurora.org>

parent e1b54da6

arch/arm/boot/dts/qcom/mdm9630-cdp.dtsi

+8 −0

Original line number	Original line	Diff line number	Diff line
	@@ -53,6 +53,14 @@
	};		};

	gpio@c100 { /* GPIO 2 */		gpio@c100 { /* GPIO 2 */
			qcom,mode = <1>; /* Digital output */
			qcom,output-type = <0>; /* CMOS logic */
			qcom,invert = <0>; /* no inversion */
			qcom,vin-sel = <2>; /* VIN 2 */
			qcom,src-sel = <2>; /* Function 2 */
			qcom,out-strength = <2>; /* Medium */
			qcom,master-en = <1>; /* Enable GPIO */
			status = "ok";
	};		};

	gpio@c200 { /* GPIO 3 */		gpio@c200 { /* GPIO 3 */

arch/arm/boot/dts/qcom/mdm9630-mtp.dtsi

+8 −0

Original line number	Original line	Diff line number	Diff line
	@@ -58,6 +58,14 @@
	};		};

	gpio@c100 { /* GPIO 2 */		gpio@c100 { /* GPIO 2 */
			qcom,mode = <1>; /* Digital output */
			qcom,output-type = <0>; /* CMOS logic */
			qcom,invert = <0>; /* no inversion */
			qcom,vin-sel = <2>; /* VIN 2 */
			qcom,src-sel = <2>; /* Function 2 */
			qcom,out-strength = <2>; /* Medium */
			qcom,master-en = <1>; /* Enable GPIO */
			status = "ok";
	};		};

	gpio@c200 { /* GPIO 3 */		gpio@c200 { /* GPIO 3 */