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Commit 7a43f137 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "USB: phy-msm-usb: Route HSUSB controller signals to HSPHY2"

parents 7d2b15f9 ade15bac
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+2 −0
Original line number Diff line number Diff line
@@ -29,6 +29,8 @@ Required properties :
         "HSUSB_1p8-supply" and "HSUSB_3p3-supply".

Optional properties :
- reg : offset and length of the TCSR register for routing USB Controller
	signals to either picoPHY0 or picoPHY1.
- interrupt-names : Optional interrupt resource entries are:
    "async_irq" : Interrupt from HSPHY for asynchronous wakeup events in LPM.
    "pmic_id_irq" : Interrupt from PMIC for external ID pin notification.
+22 −0
Original line number Diff line number Diff line
@@ -4345,6 +4345,7 @@ static int __init msm_otg_probe(struct platform_device *pdev)
	struct msm_otg *motg;
	struct usb_phy *phy;
	struct msm_otg_platform_data *pdata;
	void __iomem *tcsr;

	dev_info(&pdev->dev, "msm_otg probe\n");

@@ -4516,6 +4517,27 @@ static int __init msm_otg_probe(struct platform_device *pdev)
	}
	dev_info(&pdev->dev, "OTG regs = %p\n", motg->regs);

	if (pdata->enable_sec_phy) {
		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
		if (!res) {
			dev_dbg(&pdev->dev, "missing TCSR memory resource\n");
		} else {
			tcsr = devm_ioremap_nocache(&pdev->dev, res->start,
				resource_size(res));
			if (!tcsr) {
				dev_dbg(&pdev->dev, "tcsr ioremap failed\n");
			} else {
				/* Enable USB2 on secondary HSPHY. */
				writel_relaxed(0x1, tcsr);
				/*
				 * Ensure that TCSR write is completed before
				 * USB registers initialization.
				 */
				mb();
			}
		}
	}

	if (pdata->enable_sec_phy)
		motg->usb_phy_ctrl_reg = USB_PHY_CTRL2;
	else