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Commit 78662130 authored by Mark Zhang's avatar Mark Zhang Committed by Stephen Warren
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ARM: tegra30: clk: Fix output_rate overflow 



Change the type of variable from "unsigned long" to "u64".
This avoids the overflow while clock rate calculating.

Signed-off-by: default avatarMark Zhang <markz@nvidia.com>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent ddffeb8c

arch/arm/mach-tegra/tegra30_clocks.c

+1 −1
Original line number Diff line number Diff line
@@ -1199,7 +1199,7 @@ static long tegra30_pll_round_rate(struct clk_hw *hw, unsigned long rate, 
{

	struct clk_tegra *c = to_clk_tegra(hw);

	unsigned long input_rate = *prate;

	unsigned long output_rate = *prate;

	u64 output_rate = *prate;

	const struct clk_pll_freq_table *sel;

	struct clk_pll_freq_table cfg;

	int mul;