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Commit 781130f7 authored by Tanmay Inamdar's avatar Tanmay Inamdar Committed by Tony Truong
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arm64: PCI(e) arch support



This patch adds the arch support for PCI(e) for arm64. The files
added or modified in this patch are based on PCI(e) support in
32bit arm.

Change-Id: Ie274623b5bf053e63d8857d256cbf91fef80bcf4
Signed-off-by: default avatarTanmay Inamdar <tinamdar@apm.com>
Signed-off-by: default avatardann frazier <dann.frazier@canonical.com>
Signed-off-by: default avatarTim Gardner <tim.gardner@canonical.com>
Git-commit: 0dbd501893bc8b003be715b8320e520614bd8ae1
Git-repo: git://kernel.ubuntu.com/ubuntu/ubuntu-trusty.git


[yanhe@codeaurora.org: solve the minor compilation errors]
Signed-off-by: default avatarYan He <yanhe@codeaurora.org>
parent 512fe370
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+17 −0
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@@ -182,6 +182,23 @@ menu "Bus support"
config ARM_AMBA
	bool

config PCI
       bool "PCI support"
       help
         Find out whether you have a PCI motherboard. PCI is the name of a
         bus system, i.e. the way the CPU talks to the other stuff inside
         your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
         VESA. If you have PCI, say Y, otherwise N.

config PCI_DOMAINS
       bool
       depends on PCI

config PCI_SYSCALL
       def_bool PCI

source "drivers/pci/Kconfig"
source "drivers/pci/pcie/Kconfig"
endmenu

menu "Kernel Features"
+18 −0
Original line number Diff line number Diff line
/*
 * Based on linux/arch/arm/include/asm/dma.h
 */
#ifndef __ASM_ARM_DMA_H
#define __ASM_ARM_DMA_H

/*
 * This is the maximum virtual address which can be DMA'd from.
 */
#define MAX_DMA_ADDRESS	(~0ULL)

#ifdef CONFIG_PCI
extern int isa_dma_bridge_buggy;
#else
#define isa_dma_bridge_buggy    (0)
#endif

#endif /* __ASM_ARM_DMA_H */
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+20 −1
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@@ -159,12 +159,31 @@ static inline u64 __raw_readq_no_log(const volatile void __iomem *addr)
#define writel(v,c)		({ __iowmb(); writel_relaxed((v),(c)); })
#define writeq(v,c)		({ __iowmb(); writeq_relaxed((v),(c)); })

/*
 * A typesafe __io() helper
 */
static inline void __iomem *__typesafe_io(unsigned long addr)
{
	return (void __iomem *)addr;
}

/*
 *  I/O port access primitives.
 */
#define IO_SPACE_LIMIT		0xffff
#define PCI_IOBASE		((void __iomem *)(MODULES_VADDR - SZ_2M))

#if defined(CONFIG_PCI)
#define IO_SPACE_LIMIT  ((resource_size_t)0xffffffff)
#define __io(a)         __typesafe_io((unsigned long)PCI_IOBASE + \
				      ((a) & IO_SPACE_LIMIT))
#else
#define IO_SPACE_LIMIT		0xffff
#define __io(a)         __typesafe_io((a) & IO_SPACE_LIMIT)
#endif
extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
extern void ioport_unmap(void __iomem *addr);
extern int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr);

static inline u8 inb(unsigned long addr)
{
	return readb(addr + PCI_IOBASE);
+73 −0
Original line number Diff line number Diff line
/*
 * Based on arch/arm/include/asm/pci.h
 */
#ifndef ASMARM_PCI_H
#define ASMARM_PCI_H

#ifdef __KERNEL__
#include <asm-generic/pci-dma-compat.h>
#include <asm-generic/pci-bridge.h>

#include <asm/pcibios.h>	/* for pci_sys_data */

extern unsigned long pcibios_min_io;
#define PCIBIOS_MIN_IO pcibios_min_io
extern unsigned long pcibios_min_mem;
#define PCIBIOS_MIN_MEM pcibios_min_mem

static inline int pcibios_assign_all_busses(void)
{
	return pci_has_flag(PCI_REASSIGN_ALL_RSRC);
}

#ifdef CONFIG_PCI_DOMAINS
static inline int pci_domain_nr(struct pci_bus *bus)
{
	struct pci_sys_data *root = bus->sysdata;

	return root->domain;
}
static inline int pci_proc_domain(struct pci_bus *bus)
{
	return pci_domain_nr(bus);
}
#endif /* CONFIG_PCI_DOMAINS */

static inline void pcibios_penalize_isa_irq(int irq, int active)
{
	/* We don't do dynamic PCI IRQ allocation */
}

/*
 * The PCI address space does equal the physical memory address space.
 * The networking and block device layers use this boolean for bounce
 * buffer decisions.
 */
#define PCI_DMA_BUS_IS_PHYS     (1)

#ifdef CONFIG_PCI
static inline void pci_dma_burst_advice(struct pci_dev *pdev,
					enum pci_dma_burst_strategy *strat,
					unsigned long *strategy_parameter)
{
   *strat = PCI_DMA_BURST_INFINITY;
	*strategy_parameter = ~0UL;
}
#endif

#define HAVE_PCI_MMAP
extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
			       enum pci_mmap_state mmap_state,
			       int write_combine);

/*
 * Dummy implementation; always return 0.
 */
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
{
	return 0;
}

#endif /* __KERNEL__ */

#endif
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+98 −0
Original line number Diff line number Diff line
/*
 *  Based on arch/arm/include/asm/mach/pci.h
 *
 *  Copyright (C) 2000 Russell King
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef __ASM_PCIBIOS_H
#define __ASM_PCIBIOS_H

#include <linux/ioport.h>

struct pci_sys_data;
struct pci_ops;
struct pci_bus;
struct device;

struct hw_pci {
#ifdef CONFIG_PCI_DOMAINS
	int domain;
#endif
	struct pci_ops *ops;
	int nr_controllers;
	void **private_data;
	int (*setup) (int nr, struct pci_sys_data *);
	struct pci_bus *(*scan) (int nr, struct pci_sys_data *);
	void (*preinit) (void);
	void (*postinit) (void);
	 u8(*swizzle) (struct pci_dev *dev, u8 *pin);
	int (*map_irq) (const struct pci_dev *dev, u8 slot, u8 pin);
	 resource_size_t(*align_resource) (struct pci_dev *dev,
					   const struct resource *res,
					   resource_size_t start,
					   resource_size_t size,
					   resource_size_t align);
	void (*add_bus) (struct pci_bus *bus);
	void (*remove_bus) (struct pci_bus *bus);
};

/*
 * Per-controller structure
 */
struct pci_sys_data {
#ifdef CONFIG_PCI_DOMAINS
	int domain;
#endif
	struct list_head node;
	int busnr;		/* primary bus number                   */
	u64 mem_offset;		/* bus->cpu memory mapping offset       */
	unsigned long io_offset;	/* bus->cpu IO mapping offset   */
	struct pci_bus *bus;	/* PCI bus                              */
	struct list_head resources;	/* root bus resources (apertures) */
	struct resource io_res;
	char io_res_name[12];
	/* Bridge swizzling                     */
	 u8(*swizzle) (struct pci_dev *, u8 *);
	/* IRQ mapping                          */
	int (*map_irq) (const struct pci_dev *, u8, u8);
	/* Resource alignement requirements     */
	 resource_size_t(*align_resource) (struct pci_dev *dev,
					   const struct resource *res,
					   resource_size_t start,
					   resource_size_t size,
					   resource_size_t align);
	void (*add_bus) (struct pci_bus *bus);
	void (*remove_bus) (struct pci_bus *bus);
	void *private_data;	/* platform controller private data     */
};

/*
 * Call this with your hw_pci struct to initialise the PCI system.
 */
void pci_common_init_dev(struct device *, struct hw_pci *);

/*
 * Compatibility wrapper for older platforms that do not care about
 * passing the parent device.
 */
static inline void pci_common_init(struct hw_pci *hw)
{
	pci_common_init_dev(NULL, hw);
}

/*
 * Setup early fixed I/O mapping.
 */
#if defined(CONFIG_PCI)
extern void pci_map_io_early(unsigned long pfn);
#else
static inline void pci_map_io_early(unsigned long pfn)
{
}
#endif

#endif /* __ASM_PCIBIOS_H */
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