Loading Documentation/devicetree/bindings/mmc/sdhci-msm.txt +12 −0 Original line number Diff line number Diff line Loading @@ -114,6 +114,10 @@ In the following, <supply> can be vdd (flash core voltage) or vdd-io (I/O voltag The default CPU affinity mode is PM_QOS_REQ_AFFINE_IRQ to maintain backward compatibility. - qcom,cpu-affinity-mask: this is a bitmap that specifies little cluster CPU cores used for PM QoS voting. This is parsed only for pm QoS request type of PM_QOS_REQ_AFFINE_CORES ("affine_cores"). Example: aliases { Loading Loading @@ -144,6 +148,10 @@ Example: qcom,bus-width = <4>; qcom,cpu-dma-latency-us = <301>; qcom,cpu-affinity = "affine_cores"; qcom,cpu-affinity-mask = <0x0f>; qcom,nonremovable; qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v"; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; Loading Loading @@ -182,6 +190,10 @@ Example: qcom,bus-width = <4>; qcom,cpu-dma-latency-us = <301>; qcom,cpu-affinity = "affine_cores"; qcom,cpu-affinity-mask = <0x0f>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */ Loading drivers/mmc/host/sdhci-msm.c +19 −10 Original line number Diff line number Diff line Loading @@ -316,6 +316,7 @@ struct sdhci_msm_pltfm_data { int mpm_sdiowakeup_int; int sdiowakeup_irq; enum pm_qos_req_type cpu_affinity_type; cpumask_t cpu_affinity_mask; }; struct sdhci_msm_bus_vote { Loading Loading @@ -1457,24 +1458,28 @@ out: } #ifdef CONFIG_SMP static void sdhci_msm_populate_affinity_type(struct sdhci_msm_pltfm_data *pdata, static void sdhci_msm_populate_affinity(struct sdhci_msm_pltfm_data *pdata, struct device_node *np) { const char *cpu_affinity = NULL; u32 cpu_mask; pdata->cpu_affinity_type = PM_QOS_REQ_AFFINE_IRQ; if (!of_property_read_string(np, "qcom,cpu-affinity", &cpu_affinity)) { if (!of_property_read_string(np, "qcom,cpu-affinity", &cpu_affinity)) { if (!strcmp(cpu_affinity, "all_cores")) pdata->cpu_affinity_type = PM_QOS_REQ_ALL_CORES; else if (!strcmp(cpu_affinity, "affine_cores")) pdata->cpu_affinity_type = PM_QOS_REQ_AFFINE_CORES; else if (!strcmp(cpu_affinity, "affine_irq")) pdata->cpu_affinity_type = PM_QOS_REQ_AFFINE_IRQ; else if (!strcmp(cpu_affinity, "affine_cores") && !of_property_read_u32(np, "qcom,cpu-affinity-mask", &cpu_mask)) { cpumask_bits(&pdata->cpu_affinity_mask)[0] = cpu_mask; pdata->cpu_affinity_type = PM_QOS_REQ_AFFINE_CORES; } } } #else static void sdhci_msm_populate_affinity_type(struct sdhci_msm_pltfm_data *pdata, static void sdhci_msm_populate_affinity(struct sdhci_msm_pltfm_data *pdata, struct device_node *np) { } Loading Loading @@ -1592,7 +1597,7 @@ static struct sdhci_msm_pltfm_data *sdhci_msm_populate_pdata(struct device *dev) else pdata->mpm_sdiowakeup_int = -1; sdhci_msm_populate_affinity_type(pdata, np); sdhci_msm_populate_affinity(pdata, np); return pdata; out: Loading Loading @@ -3288,6 +3293,10 @@ static int sdhci_msm_probe(struct platform_device *pdev) host->cpu_dma_latency_us = msm_host->pdata->cpu_dma_latency_us; host->pm_qos_req_dma.type = msm_host->pdata->cpu_affinity_type; if (host->pm_qos_req_dma.type == PM_QOS_REQ_AFFINE_CORES) bitmap_copy(cpumask_bits(&host->pm_qos_req_dma.cpus_affine), cpumask_bits(&msm_host->pdata->cpu_affinity_mask), nr_cpumask_bits); init_completion(&msm_host->pwr_irq_completion); Loading drivers/mmc/host/sdhci.c +1 −3 Original line number Diff line number Diff line Loading @@ -3444,9 +3444,7 @@ static void sdhci_set_pmqos_req_type(struct sdhci_host *host) * little cluster and will update/apply the vote to all the cores in * the little cluster. */ if (host->pm_qos_req_dma.type == PM_QOS_REQ_AFFINE_CORES) host->pm_qos_req_dma.cpus_affine.bits[0] = 0x0F; else if (host->pm_qos_req_dma.type == PM_QOS_REQ_AFFINE_IRQ) if (host->pm_qos_req_dma.type == PM_QOS_REQ_AFFINE_IRQ) host->pm_qos_req_dma.irq = host->irq; } #else Loading Loading
Documentation/devicetree/bindings/mmc/sdhci-msm.txt +12 −0 Original line number Diff line number Diff line Loading @@ -114,6 +114,10 @@ In the following, <supply> can be vdd (flash core voltage) or vdd-io (I/O voltag The default CPU affinity mode is PM_QOS_REQ_AFFINE_IRQ to maintain backward compatibility. - qcom,cpu-affinity-mask: this is a bitmap that specifies little cluster CPU cores used for PM QoS voting. This is parsed only for pm QoS request type of PM_QOS_REQ_AFFINE_CORES ("affine_cores"). Example: aliases { Loading Loading @@ -144,6 +148,10 @@ Example: qcom,bus-width = <4>; qcom,cpu-dma-latency-us = <301>; qcom,cpu-affinity = "affine_cores"; qcom,cpu-affinity-mask = <0x0f>; qcom,nonremovable; qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v"; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; Loading Loading @@ -182,6 +190,10 @@ Example: qcom,bus-width = <4>; qcom,cpu-dma-latency-us = <301>; qcom,cpu-affinity = "affine_cores"; qcom,cpu-affinity-mask = <0x0f>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */ Loading
drivers/mmc/host/sdhci-msm.c +19 −10 Original line number Diff line number Diff line Loading @@ -316,6 +316,7 @@ struct sdhci_msm_pltfm_data { int mpm_sdiowakeup_int; int sdiowakeup_irq; enum pm_qos_req_type cpu_affinity_type; cpumask_t cpu_affinity_mask; }; struct sdhci_msm_bus_vote { Loading Loading @@ -1457,24 +1458,28 @@ out: } #ifdef CONFIG_SMP static void sdhci_msm_populate_affinity_type(struct sdhci_msm_pltfm_data *pdata, static void sdhci_msm_populate_affinity(struct sdhci_msm_pltfm_data *pdata, struct device_node *np) { const char *cpu_affinity = NULL; u32 cpu_mask; pdata->cpu_affinity_type = PM_QOS_REQ_AFFINE_IRQ; if (!of_property_read_string(np, "qcom,cpu-affinity", &cpu_affinity)) { if (!of_property_read_string(np, "qcom,cpu-affinity", &cpu_affinity)) { if (!strcmp(cpu_affinity, "all_cores")) pdata->cpu_affinity_type = PM_QOS_REQ_ALL_CORES; else if (!strcmp(cpu_affinity, "affine_cores")) pdata->cpu_affinity_type = PM_QOS_REQ_AFFINE_CORES; else if (!strcmp(cpu_affinity, "affine_irq")) pdata->cpu_affinity_type = PM_QOS_REQ_AFFINE_IRQ; else if (!strcmp(cpu_affinity, "affine_cores") && !of_property_read_u32(np, "qcom,cpu-affinity-mask", &cpu_mask)) { cpumask_bits(&pdata->cpu_affinity_mask)[0] = cpu_mask; pdata->cpu_affinity_type = PM_QOS_REQ_AFFINE_CORES; } } } #else static void sdhci_msm_populate_affinity_type(struct sdhci_msm_pltfm_data *pdata, static void sdhci_msm_populate_affinity(struct sdhci_msm_pltfm_data *pdata, struct device_node *np) { } Loading Loading @@ -1592,7 +1597,7 @@ static struct sdhci_msm_pltfm_data *sdhci_msm_populate_pdata(struct device *dev) else pdata->mpm_sdiowakeup_int = -1; sdhci_msm_populate_affinity_type(pdata, np); sdhci_msm_populate_affinity(pdata, np); return pdata; out: Loading Loading @@ -3288,6 +3293,10 @@ static int sdhci_msm_probe(struct platform_device *pdev) host->cpu_dma_latency_us = msm_host->pdata->cpu_dma_latency_us; host->pm_qos_req_dma.type = msm_host->pdata->cpu_affinity_type; if (host->pm_qos_req_dma.type == PM_QOS_REQ_AFFINE_CORES) bitmap_copy(cpumask_bits(&host->pm_qos_req_dma.cpus_affine), cpumask_bits(&msm_host->pdata->cpu_affinity_mask), nr_cpumask_bits); init_completion(&msm_host->pwr_irq_completion); Loading
drivers/mmc/host/sdhci.c +1 −3 Original line number Diff line number Diff line Loading @@ -3444,9 +3444,7 @@ static void sdhci_set_pmqos_req_type(struct sdhci_host *host) * little cluster and will update/apply the vote to all the cores in * the little cluster. */ if (host->pm_qos_req_dma.type == PM_QOS_REQ_AFFINE_CORES) host->pm_qos_req_dma.cpus_affine.bits[0] = 0x0F; else if (host->pm_qos_req_dma.type == PM_QOS_REQ_AFFINE_IRQ) if (host->pm_qos_req_dma.type == PM_QOS_REQ_AFFINE_IRQ) host->pm_qos_req_dma.irq = host->irq; } #else Loading