Loading drivers/soc/qcom/pil-q6v5-mss.c +1 −0 Original line number Diff line number Diff line Loading @@ -372,6 +372,7 @@ static int pil_mss_driver_exit(struct platform_device *pdev) static struct of_device_id mss_match_table[] = { { .compatible = "qcom,pil-q6v5-mss" }, { .compatible = "qcom,pil-q6v55-mss" }, { .compatible = "qcom,pil-q6v56-mss" }, {} }; Loading drivers/soc/qcom/pil-q6v5.c +9 −1 Original line number Diff line number Diff line /* * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -46,6 +46,7 @@ /* QDSP6SS_GFMUX_CTL */ #define Q6SS_CLK_ENA BIT(1) #define Q6SS_CLK_SRC_SEL_C BIT(3) #define Q6SS_CLK_SRC_SWITCH_CLK_OVR BIT(8) /* QDSP6SS_PWR_CTL */ #define Q6SS_L2DATA_SLP_NRET_N_0 BIT(0) Loading Loading @@ -252,6 +253,11 @@ static int __pil_q6v5_reset(struct pil_desc *pil) /* Need a different clock source for v5.2.0 */ if (drv->qdsp6v5_2_0) val |= Q6SS_CLK_SRC_SEL_C; /* force clock on during source switch */ if (drv->qdsp6v56) val |= Q6SS_CLK_SRC_SWITCH_CLK_OVR; writel_relaxed(val, drv->reg_base + QDSP6SS_GFMUX_CTL); /* Start core execution */ Loading Loading @@ -388,6 +394,8 @@ struct q6v5_data *pil_q6v5_init(struct platform_device *pdev) "qcom,pil-q6v55-mss"); drv->qdsp6v55 |= of_device_is_compatible(pdev->dev.of_node, "qcom,pil-q6v55-lpass"); drv->qdsp6v56 = of_device_is_compatible(pdev->dev.of_node, "qcom,pil-q6v56-mss"); drv->xo = devm_clk_get(&pdev->dev, "xo"); if (IS_ERR(drv->xo)) Loading drivers/soc/qcom/pil-q6v5.h +2 −1 Original line number Diff line number Diff line /* * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -43,6 +43,7 @@ struct q6v5_data { void *mba_virt; bool qdsp6v55; bool qdsp6v5_2_0; bool qdsp6v56; }; int pil_q6v5_make_proxy_votes(struct pil_desc *pil); Loading Loading
drivers/soc/qcom/pil-q6v5-mss.c +1 −0 Original line number Diff line number Diff line Loading @@ -372,6 +372,7 @@ static int pil_mss_driver_exit(struct platform_device *pdev) static struct of_device_id mss_match_table[] = { { .compatible = "qcom,pil-q6v5-mss" }, { .compatible = "qcom,pil-q6v55-mss" }, { .compatible = "qcom,pil-q6v56-mss" }, {} }; Loading
drivers/soc/qcom/pil-q6v5.c +9 −1 Original line number Diff line number Diff line /* * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -46,6 +46,7 @@ /* QDSP6SS_GFMUX_CTL */ #define Q6SS_CLK_ENA BIT(1) #define Q6SS_CLK_SRC_SEL_C BIT(3) #define Q6SS_CLK_SRC_SWITCH_CLK_OVR BIT(8) /* QDSP6SS_PWR_CTL */ #define Q6SS_L2DATA_SLP_NRET_N_0 BIT(0) Loading Loading @@ -252,6 +253,11 @@ static int __pil_q6v5_reset(struct pil_desc *pil) /* Need a different clock source for v5.2.0 */ if (drv->qdsp6v5_2_0) val |= Q6SS_CLK_SRC_SEL_C; /* force clock on during source switch */ if (drv->qdsp6v56) val |= Q6SS_CLK_SRC_SWITCH_CLK_OVR; writel_relaxed(val, drv->reg_base + QDSP6SS_GFMUX_CTL); /* Start core execution */ Loading Loading @@ -388,6 +394,8 @@ struct q6v5_data *pil_q6v5_init(struct platform_device *pdev) "qcom,pil-q6v55-mss"); drv->qdsp6v55 |= of_device_is_compatible(pdev->dev.of_node, "qcom,pil-q6v55-lpass"); drv->qdsp6v56 = of_device_is_compatible(pdev->dev.of_node, "qcom,pil-q6v56-mss"); drv->xo = devm_clk_get(&pdev->dev, "xo"); if (IS_ERR(drv->xo)) Loading
drivers/soc/qcom/pil-q6v5.h +2 −1 Original line number Diff line number Diff line /* * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -43,6 +43,7 @@ struct q6v5_data { void *mba_virt; bool qdsp6v55; bool qdsp6v5_2_0; bool qdsp6v56; }; int pil_q6v5_make_proxy_votes(struct pil_desc *pil); Loading