Loading Documentation/devicetree/bindings/arm/msm/acpuclock/clock-a7.txt +1 −1 Original line number Diff line number Diff line Loading @@ -7,7 +7,7 @@ optionally have a register which encodes the maximum rate supported by hw. Required properties: - compatible: "qcom,clock-a7-8226", "qcom,clock-a7-9630", "qcom,clock-a53-8916", "qcom,clock-a7-9640" "qcom,clock-a53-8916", "qcom,clock-a7-9640", "qcom,clock-a7-vpipa" - reg: pairs of physical address and region size - reg-names: "rcg-base" is expected - clock-names: list of names of clock inputs Loading Documentation/devicetree/bindings/arm/msm/msm.txt +4 −0 Original line number Diff line number Diff line Loading @@ -71,6 +71,9 @@ SoCs: - MDM9640 compatible = "qcom,mdm9640" - VPIPA compatible = "qcom,msmvpipa" - FSM9010 compatible = "qcom,fsm9010" Loading Loading @@ -198,3 +201,4 @@ compatible = "qcom,fsm9010-cdp" compatible = "qcom,fsm9010-mtp" compatible = "qcom,fsm9900-cdp" compatible = "qcom,fsm9900-mtp" compatible = "qcom,msmvpipa-sim" Documentation/devicetree/bindings/pinctrl/msm-pinctrl.txt +1 −0 Original line number Diff line number Diff line Loading @@ -13,6 +13,7 @@ semantics. "qcom,msm-tlmm-8226" "qcom,msm-tlmm-8974" "qcom,msm-tlmm-mdm9640" "qcom,msm-tlmm-vpipa" - reg: Base address of the pin controller hardware module and length of the address space it occupies. Loading arch/arm/boot/dts/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -180,6 +180,7 @@ dtb-$(CONFIG_ARCH_MDM9640) += mdm9640-sim.dtb \ mdm9640-emmc-cdp.dtb \ mdm9640-nand-cdp.dtb \ mdm9640-mtp.dtb dtb-$(CONFIG_ARCH_MSMVPIPA) += msmvpipa-sim.dtb dtb-$(CONFIG_ARCH_MDMFERRUM) += mdmferrum-sim.dtb \ mdmferrum-rumi.dtb \ mdmferrum-cdp.dtb \ Loading arch/arm/boot/dts/qcom/msmvpipa-pinctrl.dtsi 0 → 100644 +45 −0 Original line number Diff line number Diff line /* Copyright (c) 2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ &soc { tlmm_pinmux: pinctrl@1000000 { compatible = "qcom,msm-tlmm-vpipa", "qcom,msm-tlmm-8916"; reg = <0x1000000 0x300000>; interrupts = <0 208 0>; /* General purpose pins */ gp: gp { qcom,num-pins = <100>; #qcom,pin-cells = <1>; msm_gpio: msm_gpio { compatible = "qcom,msm-tlmm-gp"; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; num_irqs = <100>; }; }; pmx-uart2console { qcom,pins = <&gp 4>, <&gp 5>; qcom,num-grp-pins = <2>; qcom,pin-func = <2>; label = "uart2-console"; uart2_console_active: uart2-console { drive-strength = <2>; bias-pull-down; }; }; }; }; Loading
Documentation/devicetree/bindings/arm/msm/acpuclock/clock-a7.txt +1 −1 Original line number Diff line number Diff line Loading @@ -7,7 +7,7 @@ optionally have a register which encodes the maximum rate supported by hw. Required properties: - compatible: "qcom,clock-a7-8226", "qcom,clock-a7-9630", "qcom,clock-a53-8916", "qcom,clock-a7-9640" "qcom,clock-a53-8916", "qcom,clock-a7-9640", "qcom,clock-a7-vpipa" - reg: pairs of physical address and region size - reg-names: "rcg-base" is expected - clock-names: list of names of clock inputs Loading
Documentation/devicetree/bindings/arm/msm/msm.txt +4 −0 Original line number Diff line number Diff line Loading @@ -71,6 +71,9 @@ SoCs: - MDM9640 compatible = "qcom,mdm9640" - VPIPA compatible = "qcom,msmvpipa" - FSM9010 compatible = "qcom,fsm9010" Loading Loading @@ -198,3 +201,4 @@ compatible = "qcom,fsm9010-cdp" compatible = "qcom,fsm9010-mtp" compatible = "qcom,fsm9900-cdp" compatible = "qcom,fsm9900-mtp" compatible = "qcom,msmvpipa-sim"
Documentation/devicetree/bindings/pinctrl/msm-pinctrl.txt +1 −0 Original line number Diff line number Diff line Loading @@ -13,6 +13,7 @@ semantics. "qcom,msm-tlmm-8226" "qcom,msm-tlmm-8974" "qcom,msm-tlmm-mdm9640" "qcom,msm-tlmm-vpipa" - reg: Base address of the pin controller hardware module and length of the address space it occupies. Loading
arch/arm/boot/dts/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -180,6 +180,7 @@ dtb-$(CONFIG_ARCH_MDM9640) += mdm9640-sim.dtb \ mdm9640-emmc-cdp.dtb \ mdm9640-nand-cdp.dtb \ mdm9640-mtp.dtb dtb-$(CONFIG_ARCH_MSMVPIPA) += msmvpipa-sim.dtb dtb-$(CONFIG_ARCH_MDMFERRUM) += mdmferrum-sim.dtb \ mdmferrum-rumi.dtb \ mdmferrum-cdp.dtb \ Loading
arch/arm/boot/dts/qcom/msmvpipa-pinctrl.dtsi 0 → 100644 +45 −0 Original line number Diff line number Diff line /* Copyright (c) 2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ &soc { tlmm_pinmux: pinctrl@1000000 { compatible = "qcom,msm-tlmm-vpipa", "qcom,msm-tlmm-8916"; reg = <0x1000000 0x300000>; interrupts = <0 208 0>; /* General purpose pins */ gp: gp { qcom,num-pins = <100>; #qcom,pin-cells = <1>; msm_gpio: msm_gpio { compatible = "qcom,msm-tlmm-gp"; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; num_irqs = <100>; }; }; pmx-uart2console { qcom,pins = <&gp 4>, <&gp 5>; qcom,num-grp-pins = <2>; qcom,pin-func = <2>; label = "uart2-console"; uart2_console_active: uart2-console { drive-strength = <2>; bias-pull-down; }; }; }; };