Loading arch/powerpc/kernel/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -11,7 +11,7 @@ CFLAGS_btext.o += -fPIC endif obj-y := semaphore.o cputable.o ptrace.o syscalls.o \ signal_32.o pmc.o irq.o signal_32.o pmc.o obj-$(CONFIG_PPC64) += setup_64.o binfmt_elf32.o sys_ppc32.o \ signal_64.o ptrace32.o systbl.o obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o Loading arch/ppc64/kernel/irq.c→arch/powerpc/kernel/irq.c +93 −30 Original line number Diff line number Diff line Loading @@ -5,8 +5,8 @@ * Copyright (C) 1992 Linus Torvalds * Adapted from arch/i386 by Gary Thomas * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * Updated and modified by Cort Dougan (cort@cs.nmt.edu) * Copyright (C) 1996 Cort Dougan * Updated and modified by Cort Dougan <cort@fsmlabs.com> * Copyright (C) 1996-2001 Cort Dougan * Adapted for Power Macintosh by Paul Mackerras * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). Loading @@ -21,6 +21,14 @@ * instead of just grabbing them. Thus setups with different IRQ numbers * shouldn't result in any weird surprises, and installing new handlers * should be easier. * * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit * mask register (of which only 16 are defined), hence the weird shifting * and complement of the cached_irq_mask. I want to be able to stuff * this right into the SIU SMASK register. * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx * to reduce code space and undefined function references. */ #include <linux/errno.h> Loading @@ -29,6 +37,7 @@ #include <linux/kernel_stat.h> #include <linux/signal.h> #include <linux/sched.h> #include <linux/ptrace.h> #include <linux/ioport.h> #include <linux/interrupt.h> #include <linux/timex.h> Loading @@ -40,9 +49,13 @@ #include <linux/irq.h> #include <linux/proc_fs.h> #include <linux/random.h> #include <linux/kallsyms.h> #include <linux/seq_file.h> #include <linux/cpumask.h> #include <linux/profile.h> #include <linux/bitops.h> #ifdef CONFIG_PPC64 #include <linux/kallsyms.h> #endif #include <asm/uaccess.h> #include <asm/system.h> Loading @@ -52,21 +65,42 @@ #include <asm/cache.h> #include <asm/prom.h> #include <asm/ptrace.h> #include <asm/iseries/it_lp_queue.h> #include <asm/machdep.h> #ifdef CONFIG_PPC64 #include <asm/iseries/it_lp_queue.h> #include <asm/paca.h> #endif #ifdef CONFIG_SMP static int ppc_spurious_interrupts; #if defined(CONFIG_PPC_ISERIES) && defined(CONFIG_SMP) extern void iSeries_smp_message_recv(struct pt_regs *); #endif extern irq_desc_t irq_desc[NR_IRQS]; #ifdef CONFIG_PPC32 #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; atomic_t ppc_n_lost_interrupts; #ifdef CONFIG_TAU_INT extern int tau_initialized; extern int tau_interrupts(int); #endif #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) extern atomic_t ipi_recv; extern atomic_t ipi_sent; #endif #endif /* CONFIG_PPC32 */ #ifdef CONFIG_PPC64 EXPORT_SYMBOL(irq_desc); int distribute_irqs = 1; int __irq_offset_value; int ppc_spurious_interrupts; u64 ppc64_interrupt_controller; #endif /* CONFIG_PPC64 */ int show_interrupts(struct seq_file *p, void *v) { Loading @@ -76,11 +110,9 @@ int show_interrupts(struct seq_file *p, void *v) unsigned long flags; if (i == 0) { seq_printf(p, " "); for (j=0; j<NR_CPUS; j++) { if (cpu_online(j)) seq_puts(p, " "); for_each_online_cpu(j) seq_printf(p, "CPU%d ", j); } seq_putc(p, '\n'); } Loading @@ -92,17 +124,15 @@ int show_interrupts(struct seq_file *p, void *v) goto skip; seq_printf(p, "%3d: ", i); #ifdef CONFIG_SMP for (j = 0; j < NR_CPUS; j++) { if (cpu_online(j)) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); } #else seq_printf(p, "%10u ", kstat_irqs(i)); #endif /* CONFIG_SMP */ if (desc->handler) seq_printf(p, " %s ", desc->handler->typename); else seq_printf(p, " None "); seq_puts(p, " None "); seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); seq_printf(p, " %s", action->name); for (action = action->next; action; action = action->next) Loading @@ -110,8 +140,25 @@ int show_interrupts(struct seq_file *p, void *v) seq_putc(p, '\n'); skip: spin_unlock_irqrestore(&desc->lock, flags); } else if (i == NR_IRQS) } else if (i == NR_IRQS) { #ifdef CONFIG_PPC32 #ifdef CONFIG_TAU_INT if (tau_initialized){ seq_puts(p, "TAU: "); for (j = 0; j < NR_CPUS; j++) if (cpu_online(j)) seq_printf(p, "%10u ", tau_interrupts(j)); seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); } #endif #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) /* should this be per processor send/receive? */ seq_printf(p, "IPI (recv/sent): %10u/%u\n", atomic_read(&ipi_recv), atomic_read(&ipi_sent)); #endif #endif /* CONFIG_PPC32 */ seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); } return 0; } Loading Loading @@ -211,6 +258,13 @@ void do_IRQ(struct pt_regs *regs) } #endif /* * Every platform is required to implement ppc_md.get_irq. * This function will either return an irq number or -1 to * indicate there are no more pending. * The value -2 is for buggy hardware and means that this IRQ * has already been handled. -- Tom */ irq = ppc_md.get_irq(regs); if (irq >= 0) { Loading @@ -229,15 +283,19 @@ void do_IRQ(struct pt_regs *regs) #endif __do_IRQ(irq, regs); } else #ifdef CONFIG_PPC32 if (irq != -2) #endif /* That's not SMP safe ... but who cares ? */ ppc_spurious_interrupts++; irq_exit(); } #endif /* CONFIG_PPC_ISERIES */ void __init init_IRQ(void) { #ifdef CONFIG_PPC64 static int once = 0; if (once) Loading @@ -245,10 +303,14 @@ void __init init_IRQ(void) once++; #endif ppc_md.init_IRQ(); #ifdef CONFIG_PPC64 irq_ctx_init(); #endif } #ifdef CONFIG_PPC64 #ifndef CONFIG_PPC_ISERIES /* * Virtual IRQ mapping code, used on systems with XICS interrupt controllers. Loading Loading @@ -413,3 +475,4 @@ static int __init setup_noirqdistrib(char *str) } __setup("noirqdistrib", setup_noirqdistrib); #endif /* CONFIG_PPC64 */ arch/powerpc/platforms/powermac/pic.c +3 −0 Original line number Diff line number Diff line Loading @@ -74,6 +74,9 @@ static DEFINE_SPINLOCK(pmac_pic_lock); #define GATWICK_IRQ_POOL_SIZE 10 static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE]; #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; /* * Mark an irq as "lost". This is only used on the pmac * since it can lose interrupts (see pmac_set_irq_mask). Loading arch/ppc/kernel/Makefile +2 −3 Original line number Diff line number Diff line Loading @@ -12,7 +12,7 @@ extra-$(CONFIG_6xx) += idle_6xx.o extra-$(CONFIG_POWER4) += idle_power4.o extra-y += vmlinux.lds obj-y := entry.o traps.o irq.o idle.o time.o misc.o \ obj-y := entry.o traps.o idle.o time.o misc.o \ process.o align.o \ setup.o \ ppc_htab.o Loading @@ -38,8 +38,7 @@ endif # These are here while we do the architecture merge else obj-y := irq.o idle.o \ align.o obj-y := idle.o align.o obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o obj-$(CONFIG_MODULES) += module.o Loading arch/ppc/kernel/irq.cdeleted 100644 → 0 +0 −165 Original line number Diff line number Diff line /* * arch/ppc/kernel/irq.c * * Derived from arch/i386/kernel/irq.c * Copyright (C) 1992 Linus Torvalds * Adapted from arch/i386 by Gary Thomas * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * Updated and modified by Cort Dougan <cort@fsmlabs.com> * Copyright (C) 1996-2001 Cort Dougan * Adapted for Power Macintosh by Paul Mackerras * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). * * This file contains the code used by various IRQ handling routines: * asking for different IRQ's should be done through these routines * instead of just grabbing them. Thus setups with different IRQ numbers * shouldn't result in any weird surprises, and installing new handlers * should be easier. * * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit * mask register (of which only 16 are defined), hence the weird shifting * and complement of the cached_irq_mask. I want to be able to stuff * this right into the SIU SMASK register. * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx * to reduce code space and undefined function references. */ #include <linux/errno.h> #include <linux/module.h> #include <linux/threads.h> #include <linux/kernel_stat.h> #include <linux/signal.h> #include <linux/sched.h> #include <linux/ptrace.h> #include <linux/ioport.h> #include <linux/interrupt.h> #include <linux/timex.h> #include <linux/config.h> #include <linux/init.h> #include <linux/slab.h> #include <linux/pci.h> #include <linux/delay.h> #include <linux/irq.h> #include <linux/proc_fs.h> #include <linux/random.h> #include <linux/seq_file.h> #include <linux/cpumask.h> #include <linux/profile.h> #include <linux/bitops.h> #include <asm/uaccess.h> #include <asm/system.h> #include <asm/io.h> #include <asm/pgtable.h> #include <asm/irq.h> #include <asm/cache.h> #include <asm/prom.h> #include <asm/ptrace.h> #include <asm/machdep.h> #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) extern atomic_t ipi_recv; extern atomic_t ipi_sent; #define MAXCOUNT 10000000 int ppc_spurious_interrupts = 0; struct irqaction *ppc_irq_action[NR_IRQS]; unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; atomic_t ppc_n_lost_interrupts; #ifdef CONFIG_TAU_INT extern int tau_initialized; extern int tau_interrupts(int); #endif int show_interrupts(struct seq_file *p, void *v) { int i = *(loff_t *) v, j; struct irqaction * action; unsigned long flags; if (i == 0) { seq_puts(p, " "); for (j=0; j<NR_CPUS; j++) if (cpu_online(j)) seq_printf(p, "CPU%d ", j); seq_putc(p, '\n'); } if (i < NR_IRQS) { spin_lock_irqsave(&irq_desc[i].lock, flags); action = irq_desc[i].action; if ( !action || !action->handler ) goto skip; seq_printf(p, "%3d: ", i); #ifdef CONFIG_SMP for (j = 0; j < NR_CPUS; j++) if (cpu_online(j)) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); #else seq_printf(p, "%10u ", kstat_irqs(i)); #endif /* CONFIG_SMP */ if (irq_desc[i].handler) seq_printf(p, " %s ", irq_desc[i].handler->typename); else seq_puts(p, " None "); seq_printf(p, "%s", (irq_desc[i].status & IRQ_LEVEL) ? "Level " : "Edge "); seq_printf(p, " %s", action->name); for (action = action->next; action; action = action->next) seq_printf(p, ", %s", action->name); seq_putc(p, '\n'); skip: spin_unlock_irqrestore(&irq_desc[i].lock, flags); } else if (i == NR_IRQS) { #ifdef CONFIG_TAU_INT if (tau_initialized){ seq_puts(p, "TAU: "); for (j = 0; j < NR_CPUS; j++) if (cpu_online(j)) seq_printf(p, "%10u ", tau_interrupts(j)); seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); } #endif #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) /* should this be per processor send/receive? */ seq_printf(p, "IPI (recv/sent): %10u/%u\n", atomic_read(&ipi_recv), atomic_read(&ipi_sent)); #endif seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); } return 0; } void do_IRQ(struct pt_regs *regs) { int irq, first = 1; irq_enter(); /* * Every platform is required to implement ppc_md.get_irq. * This function will either return an irq number or -1 to * indicate there are no more pending. But the first time * through the loop this means there wasn't and IRQ pending. * The value -2 is for buggy hardware and means that this IRQ * has already been handled. -- Tom */ while ((irq = ppc_md.get_irq(regs)) >= 0) { __do_IRQ(irq, regs); first = 0; } if (irq != -2 && first) /* That's not SMP safe ... but who cares ? */ ppc_spurious_interrupts++; irq_exit(); } void __init init_IRQ(void) { ppc_md.init_IRQ(); } Loading
arch/powerpc/kernel/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -11,7 +11,7 @@ CFLAGS_btext.o += -fPIC endif obj-y := semaphore.o cputable.o ptrace.o syscalls.o \ signal_32.o pmc.o irq.o signal_32.o pmc.o obj-$(CONFIG_PPC64) += setup_64.o binfmt_elf32.o sys_ppc32.o \ signal_64.o ptrace32.o systbl.o obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o Loading
arch/ppc64/kernel/irq.c→arch/powerpc/kernel/irq.c +93 −30 Original line number Diff line number Diff line Loading @@ -5,8 +5,8 @@ * Copyright (C) 1992 Linus Torvalds * Adapted from arch/i386 by Gary Thomas * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * Updated and modified by Cort Dougan (cort@cs.nmt.edu) * Copyright (C) 1996 Cort Dougan * Updated and modified by Cort Dougan <cort@fsmlabs.com> * Copyright (C) 1996-2001 Cort Dougan * Adapted for Power Macintosh by Paul Mackerras * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). Loading @@ -21,6 +21,14 @@ * instead of just grabbing them. Thus setups with different IRQ numbers * shouldn't result in any weird surprises, and installing new handlers * should be easier. * * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit * mask register (of which only 16 are defined), hence the weird shifting * and complement of the cached_irq_mask. I want to be able to stuff * this right into the SIU SMASK register. * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx * to reduce code space and undefined function references. */ #include <linux/errno.h> Loading @@ -29,6 +37,7 @@ #include <linux/kernel_stat.h> #include <linux/signal.h> #include <linux/sched.h> #include <linux/ptrace.h> #include <linux/ioport.h> #include <linux/interrupt.h> #include <linux/timex.h> Loading @@ -40,9 +49,13 @@ #include <linux/irq.h> #include <linux/proc_fs.h> #include <linux/random.h> #include <linux/kallsyms.h> #include <linux/seq_file.h> #include <linux/cpumask.h> #include <linux/profile.h> #include <linux/bitops.h> #ifdef CONFIG_PPC64 #include <linux/kallsyms.h> #endif #include <asm/uaccess.h> #include <asm/system.h> Loading @@ -52,21 +65,42 @@ #include <asm/cache.h> #include <asm/prom.h> #include <asm/ptrace.h> #include <asm/iseries/it_lp_queue.h> #include <asm/machdep.h> #ifdef CONFIG_PPC64 #include <asm/iseries/it_lp_queue.h> #include <asm/paca.h> #endif #ifdef CONFIG_SMP static int ppc_spurious_interrupts; #if defined(CONFIG_PPC_ISERIES) && defined(CONFIG_SMP) extern void iSeries_smp_message_recv(struct pt_regs *); #endif extern irq_desc_t irq_desc[NR_IRQS]; #ifdef CONFIG_PPC32 #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; atomic_t ppc_n_lost_interrupts; #ifdef CONFIG_TAU_INT extern int tau_initialized; extern int tau_interrupts(int); #endif #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) extern atomic_t ipi_recv; extern atomic_t ipi_sent; #endif #endif /* CONFIG_PPC32 */ #ifdef CONFIG_PPC64 EXPORT_SYMBOL(irq_desc); int distribute_irqs = 1; int __irq_offset_value; int ppc_spurious_interrupts; u64 ppc64_interrupt_controller; #endif /* CONFIG_PPC64 */ int show_interrupts(struct seq_file *p, void *v) { Loading @@ -76,11 +110,9 @@ int show_interrupts(struct seq_file *p, void *v) unsigned long flags; if (i == 0) { seq_printf(p, " "); for (j=0; j<NR_CPUS; j++) { if (cpu_online(j)) seq_puts(p, " "); for_each_online_cpu(j) seq_printf(p, "CPU%d ", j); } seq_putc(p, '\n'); } Loading @@ -92,17 +124,15 @@ int show_interrupts(struct seq_file *p, void *v) goto skip; seq_printf(p, "%3d: ", i); #ifdef CONFIG_SMP for (j = 0; j < NR_CPUS; j++) { if (cpu_online(j)) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); } #else seq_printf(p, "%10u ", kstat_irqs(i)); #endif /* CONFIG_SMP */ if (desc->handler) seq_printf(p, " %s ", desc->handler->typename); else seq_printf(p, " None "); seq_puts(p, " None "); seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); seq_printf(p, " %s", action->name); for (action = action->next; action; action = action->next) Loading @@ -110,8 +140,25 @@ int show_interrupts(struct seq_file *p, void *v) seq_putc(p, '\n'); skip: spin_unlock_irqrestore(&desc->lock, flags); } else if (i == NR_IRQS) } else if (i == NR_IRQS) { #ifdef CONFIG_PPC32 #ifdef CONFIG_TAU_INT if (tau_initialized){ seq_puts(p, "TAU: "); for (j = 0; j < NR_CPUS; j++) if (cpu_online(j)) seq_printf(p, "%10u ", tau_interrupts(j)); seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); } #endif #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) /* should this be per processor send/receive? */ seq_printf(p, "IPI (recv/sent): %10u/%u\n", atomic_read(&ipi_recv), atomic_read(&ipi_sent)); #endif #endif /* CONFIG_PPC32 */ seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); } return 0; } Loading Loading @@ -211,6 +258,13 @@ void do_IRQ(struct pt_regs *regs) } #endif /* * Every platform is required to implement ppc_md.get_irq. * This function will either return an irq number or -1 to * indicate there are no more pending. * The value -2 is for buggy hardware and means that this IRQ * has already been handled. -- Tom */ irq = ppc_md.get_irq(regs); if (irq >= 0) { Loading @@ -229,15 +283,19 @@ void do_IRQ(struct pt_regs *regs) #endif __do_IRQ(irq, regs); } else #ifdef CONFIG_PPC32 if (irq != -2) #endif /* That's not SMP safe ... but who cares ? */ ppc_spurious_interrupts++; irq_exit(); } #endif /* CONFIG_PPC_ISERIES */ void __init init_IRQ(void) { #ifdef CONFIG_PPC64 static int once = 0; if (once) Loading @@ -245,10 +303,14 @@ void __init init_IRQ(void) once++; #endif ppc_md.init_IRQ(); #ifdef CONFIG_PPC64 irq_ctx_init(); #endif } #ifdef CONFIG_PPC64 #ifndef CONFIG_PPC_ISERIES /* * Virtual IRQ mapping code, used on systems with XICS interrupt controllers. Loading Loading @@ -413,3 +475,4 @@ static int __init setup_noirqdistrib(char *str) } __setup("noirqdistrib", setup_noirqdistrib); #endif /* CONFIG_PPC64 */
arch/powerpc/platforms/powermac/pic.c +3 −0 Original line number Diff line number Diff line Loading @@ -74,6 +74,9 @@ static DEFINE_SPINLOCK(pmac_pic_lock); #define GATWICK_IRQ_POOL_SIZE 10 static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE]; #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; /* * Mark an irq as "lost". This is only used on the pmac * since it can lose interrupts (see pmac_set_irq_mask). Loading
arch/ppc/kernel/Makefile +2 −3 Original line number Diff line number Diff line Loading @@ -12,7 +12,7 @@ extra-$(CONFIG_6xx) += idle_6xx.o extra-$(CONFIG_POWER4) += idle_power4.o extra-y += vmlinux.lds obj-y := entry.o traps.o irq.o idle.o time.o misc.o \ obj-y := entry.o traps.o idle.o time.o misc.o \ process.o align.o \ setup.o \ ppc_htab.o Loading @@ -38,8 +38,7 @@ endif # These are here while we do the architecture merge else obj-y := irq.o idle.o \ align.o obj-y := idle.o align.o obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o obj-$(CONFIG_MODULES) += module.o Loading
arch/ppc/kernel/irq.cdeleted 100644 → 0 +0 −165 Original line number Diff line number Diff line /* * arch/ppc/kernel/irq.c * * Derived from arch/i386/kernel/irq.c * Copyright (C) 1992 Linus Torvalds * Adapted from arch/i386 by Gary Thomas * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * Updated and modified by Cort Dougan <cort@fsmlabs.com> * Copyright (C) 1996-2001 Cort Dougan * Adapted for Power Macintosh by Paul Mackerras * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). * * This file contains the code used by various IRQ handling routines: * asking for different IRQ's should be done through these routines * instead of just grabbing them. Thus setups with different IRQ numbers * shouldn't result in any weird surprises, and installing new handlers * should be easier. * * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit * mask register (of which only 16 are defined), hence the weird shifting * and complement of the cached_irq_mask. I want to be able to stuff * this right into the SIU SMASK register. * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx * to reduce code space and undefined function references. */ #include <linux/errno.h> #include <linux/module.h> #include <linux/threads.h> #include <linux/kernel_stat.h> #include <linux/signal.h> #include <linux/sched.h> #include <linux/ptrace.h> #include <linux/ioport.h> #include <linux/interrupt.h> #include <linux/timex.h> #include <linux/config.h> #include <linux/init.h> #include <linux/slab.h> #include <linux/pci.h> #include <linux/delay.h> #include <linux/irq.h> #include <linux/proc_fs.h> #include <linux/random.h> #include <linux/seq_file.h> #include <linux/cpumask.h> #include <linux/profile.h> #include <linux/bitops.h> #include <asm/uaccess.h> #include <asm/system.h> #include <asm/io.h> #include <asm/pgtable.h> #include <asm/irq.h> #include <asm/cache.h> #include <asm/prom.h> #include <asm/ptrace.h> #include <asm/machdep.h> #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) extern atomic_t ipi_recv; extern atomic_t ipi_sent; #define MAXCOUNT 10000000 int ppc_spurious_interrupts = 0; struct irqaction *ppc_irq_action[NR_IRQS]; unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; atomic_t ppc_n_lost_interrupts; #ifdef CONFIG_TAU_INT extern int tau_initialized; extern int tau_interrupts(int); #endif int show_interrupts(struct seq_file *p, void *v) { int i = *(loff_t *) v, j; struct irqaction * action; unsigned long flags; if (i == 0) { seq_puts(p, " "); for (j=0; j<NR_CPUS; j++) if (cpu_online(j)) seq_printf(p, "CPU%d ", j); seq_putc(p, '\n'); } if (i < NR_IRQS) { spin_lock_irqsave(&irq_desc[i].lock, flags); action = irq_desc[i].action; if ( !action || !action->handler ) goto skip; seq_printf(p, "%3d: ", i); #ifdef CONFIG_SMP for (j = 0; j < NR_CPUS; j++) if (cpu_online(j)) seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); #else seq_printf(p, "%10u ", kstat_irqs(i)); #endif /* CONFIG_SMP */ if (irq_desc[i].handler) seq_printf(p, " %s ", irq_desc[i].handler->typename); else seq_puts(p, " None "); seq_printf(p, "%s", (irq_desc[i].status & IRQ_LEVEL) ? "Level " : "Edge "); seq_printf(p, " %s", action->name); for (action = action->next; action; action = action->next) seq_printf(p, ", %s", action->name); seq_putc(p, '\n'); skip: spin_unlock_irqrestore(&irq_desc[i].lock, flags); } else if (i == NR_IRQS) { #ifdef CONFIG_TAU_INT if (tau_initialized){ seq_puts(p, "TAU: "); for (j = 0; j < NR_CPUS; j++) if (cpu_online(j)) seq_printf(p, "%10u ", tau_interrupts(j)); seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); } #endif #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) /* should this be per processor send/receive? */ seq_printf(p, "IPI (recv/sent): %10u/%u\n", atomic_read(&ipi_recv), atomic_read(&ipi_sent)); #endif seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); } return 0; } void do_IRQ(struct pt_regs *regs) { int irq, first = 1; irq_enter(); /* * Every platform is required to implement ppc_md.get_irq. * This function will either return an irq number or -1 to * indicate there are no more pending. But the first time * through the loop this means there wasn't and IRQ pending. * The value -2 is for buggy hardware and means that this IRQ * has already been handled. -- Tom */ while ((irq = ppc_md.get_irq(regs)) >= 0) { __do_IRQ(irq, regs); first = 0; } if (irq != -2 && first) /* That's not SMP safe ... but who cares ? */ ppc_spurious_interrupts++; irq_exit(); } void __init init_IRQ(void) { ppc_md.init_IRQ(); }