Loading arch/arm/boot/dts/qcom/mpq8092-cdp.dtsi +8 −1 Original line number Diff line number Diff line Loading @@ -209,7 +209,14 @@ gpio@cc00 { /* GPIO 13 */ }; gpio@cd00 { /* GPIO 14 */ gpio@cd00 { /* GPIO 14 - ETH_RST_N */ qcom,mode = <1>; /* Digital output */ qcom,pull = <4>; /* PULLDOWN_10UA */ qcom,vin-sel = <0>; /* VIN0 */ qcom,src_sel = <0>; /* GPIO */ qcom,invert = <1>; /* Output high initially */ qcom,out-strength = <1>; /* Low */ qcom,master-en = <1>; /* Enable GPIO */ }; gpio@ce00 { /* GPIO 15 */ Loading arch/arm/boot/dts/qcom/mpq8092.dtsi +18 −0 Original line number Diff line number Diff line Loading @@ -854,6 +854,24 @@ qcom,pmic-arb-channel = <0>; }; emac: qcom,emac@fc540000 { cell-index = <0>; compatible = "qcom,emac"; reg-names = "emac", "emac_csr"; reg = <0xfc540000 0x10000>, <0xfc556000 0x1000>; interrupts = <0 291 0>, <0 290 0>, <0 317 0>, <0 318 0>; interrupt-names = "emac_core0_irq", "emac_core1_irq", "emac_core2_irq", "emac_core3_irq"; phy-mode = "rgmii"; phy-addr = <4>; }; qcom,vpu@fde0b000 { compatible = "qcom,vpu"; reg = <0xfde0b000 0x1000>, Loading Loading
arch/arm/boot/dts/qcom/mpq8092-cdp.dtsi +8 −1 Original line number Diff line number Diff line Loading @@ -209,7 +209,14 @@ gpio@cc00 { /* GPIO 13 */ }; gpio@cd00 { /* GPIO 14 */ gpio@cd00 { /* GPIO 14 - ETH_RST_N */ qcom,mode = <1>; /* Digital output */ qcom,pull = <4>; /* PULLDOWN_10UA */ qcom,vin-sel = <0>; /* VIN0 */ qcom,src_sel = <0>; /* GPIO */ qcom,invert = <1>; /* Output high initially */ qcom,out-strength = <1>; /* Low */ qcom,master-en = <1>; /* Enable GPIO */ }; gpio@ce00 { /* GPIO 15 */ Loading
arch/arm/boot/dts/qcom/mpq8092.dtsi +18 −0 Original line number Diff line number Diff line Loading @@ -854,6 +854,24 @@ qcom,pmic-arb-channel = <0>; }; emac: qcom,emac@fc540000 { cell-index = <0>; compatible = "qcom,emac"; reg-names = "emac", "emac_csr"; reg = <0xfc540000 0x10000>, <0xfc556000 0x1000>; interrupts = <0 291 0>, <0 290 0>, <0 317 0>, <0 318 0>; interrupt-names = "emac_core0_irq", "emac_core1_irq", "emac_core2_irq", "emac_core3_irq"; phy-mode = "rgmii"; phy-addr = <4>; }; qcom,vpu@fde0b000 { compatible = "qcom,vpu"; reg = <0xfde0b000 0x1000>, Loading