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Commit 6eb583da authored by Sivaram Nair's avatar Sivaram Nair Committed by Stephen Warren
Browse files

ARM: tegra: select correct parent clk for pll_p 



For Tegra30, pll_p clk's parent is wrongly specified as clk_m instead of
pll_ref in the tegra30_clk_init_table and this is resulting in a
boot-time warning. This patch fixes this by correcting the clk init
table.

Signed-off-by: default avatarSivaram Nair <sivaramn@nvidia.com>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 9489e9dc

arch/arm/mach-tegra/common.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -102,7 +102,7 @@ static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = { 
static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {

static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {

	/* name		parent		rate		enabled */

	/* name		parent		rate		enabled */

	{ "clk_m",	NULL,		0,		true },

	{ "clk_m",	NULL,		0,		true },

	{ "pll_p",	"clk_m",	408000000,	true },

	{ "pll_p",	"pll_ref",	408000000,	true },

	{ "pll_p_out1",	"pll_p",	9600000,	true },

	{ "pll_p_out1",	"pll_p",	9600000,	true },

	{ NULL,		NULL,		0,		0},

	{ NULL,		NULL,		0,		0},

};

};