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Commit 6cb1b145 authored by Alexander Shiyan's avatar Alexander Shiyan Committed by Arnd Bergmann
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ARM: clps711x: make all virtual addresses definition via one macro



This patch make all virtual addresses definition via one macro.
This modification allows to avoid warning "BUG: mapping for 0x80000000
at 0xff000000 out of vmalloc space".

Signed-off-by: default avatarAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 36504ac1
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+3 −12
Original line number Original line Diff line number Diff line
@@ -39,19 +39,10 @@


#include "common.h"
#include "common.h"


/*
 * The on-chip registers are given a size of 1MB so that a section can
 * be used to map them; this saves a page table.  This is the place to
 * add mappings for ROM, expansion memory, PCMCIA, etc.  (if static
 * mappings are chosen for those areas).
 *
*/

static struct map_desc autcpu12_io_desc[] __initdata = {
static struct map_desc autcpu12_io_desc[] __initdata = {
	/* memory-mapped extra io and CS8900A Ethernet chip */
	/* Memory-mapped extra io and CS8900A Ethernet chip */
 	/* ethernet chip */
	{
	{
		.virtual	= AUTCPU12_VIRT_CS8900A,
		.virtual	= IO_ADDRESS(AUTCPU12_PHYS_CS8900A),
		.pfn		= __phys_to_pfn(AUTCPU12_PHYS_CS8900A),
		.pfn		= __phys_to_pfn(AUTCPU12_PHYS_CS8900A),
		.length		= SZ_1M,
		.length		= SZ_1M,
		.type		= MT_DEVICE
		.type		= MT_DEVICE
+2 −2
Original line number Original line Diff line number Diff line
@@ -40,8 +40,8 @@
 */
 */
static struct map_desc cdb89712_io_desc[] __initdata = {
static struct map_desc cdb89712_io_desc[] __initdata = {
	{
	{
		.virtual	= ETHER_BASE,
		.virtual	= IO_ADDRESS(ETHER_PHYS_BASE),
		.pfn		=__phys_to_pfn(ETHER_START),
		.pfn		= __phys_to_pfn(ETHER_PHYS_BASE),
		.length		= ETHER_SIZE,
		.length		= ETHER_SIZE,
		.type		= MT_DEVICE
		.type		= MT_DEVICE
	}
	}
+1 −1
Original line number Original line Diff line number Diff line
@@ -45,7 +45,7 @@ static struct map_desc clps711x_io_desc[] __initdata = {
	{
	{
		.virtual	= (unsigned long)CLPS711X_VIRT_BASE,
		.virtual	= (unsigned long)CLPS711X_VIRT_BASE,
		.pfn		= __phys_to_pfn(CLPS711X_PHYS_BASE),
		.pfn		= __phys_to_pfn(CLPS711X_PHYS_BASE),
		.length		= SZ_1M,
		.length		= SZ_64K,
		.type		= MT_DEVICE
		.type		= MT_DEVICE
	}
	}
};
};
+8 −8
Original line number Original line Diff line number Diff line
@@ -51,23 +51,23 @@ extern void clps711x_map_io(void);
 *     happens).
 *     happens).
 */
 */
static struct map_desc edb7211_io_desc[] __initdata = {
static struct map_desc edb7211_io_desc[] __initdata = {
 	{	/* memory-mapped extra keyboard row */
	{	/* Memory-mapped extra keyboard row */
	 	.virtual 	= EP7211_VIRT_EXTKBD,
		.virtual 	= IO_ADDRESS(EP7211_PHYS_EXTKBD),
		.pfn		= __phys_to_pfn(EP7211_PHYS_EXTKBD),
		.pfn		= __phys_to_pfn(EP7211_PHYS_EXTKBD),
		.length		= SZ_1M,
		.length		= SZ_1M,
		.type		= MT_DEVICE,
		.type		= MT_DEVICE,
	}, {	/* and CS8900A Ethernet chip */
	}, {	/* CS8900A Ethernet chip */
		.virtual	= EP7211_VIRT_CS8900A,
		.virtual	= IO_ADDRESS(EP7211_PHYS_CS8900A),
		.pfn		= __phys_to_pfn(EP7211_PHYS_CS8900A),
		.pfn		= __phys_to_pfn(EP7211_PHYS_CS8900A),
		.length		= SZ_1M,
		.length		= SZ_1M,
		.type		= MT_DEVICE,
		.type		= MT_DEVICE,
	}, { 	/* flash banks */
	}, {	/* Flash bank 0 */
		.virtual	= EP7211_VIRT_FLASH1,
		.virtual	= IO_ADDRESS(EP7211_PHYS_FLASH1),
		.pfn		= __phys_to_pfn(EP7211_PHYS_FLASH1),
		.pfn		= __phys_to_pfn(EP7211_PHYS_FLASH1),
		.length		= SZ_8M,
		.length		= SZ_8M,
		.type		= MT_DEVICE,
		.type		= MT_DEVICE,
	}, {
	}, {	/* Flash bank 1 */
		.virtual	= EP7211_VIRT_FLASH2,
		.virtual	= IO_ADDRESS(EP7211_PHYS_FLASH2),
		.pfn		= __phys_to_pfn(EP7211_PHYS_FLASH2),
		.pfn		= __phys_to_pfn(EP7211_PHYS_FLASH2),
		.length		= SZ_8M,
		.length		= SZ_8M,
		.type		= MT_DEVICE,
		.type		= MT_DEVICE,
+4 −10
Original line number Original line Diff line number Diff line
@@ -20,12 +20,8 @@
#ifndef __ASM_ARCH_AUTCPU12_H
#ifndef __ASM_ARCH_AUTCPU12_H
#define __ASM_ARCH_AUTCPU12_H
#define __ASM_ARCH_AUTCPU12_H


/*
/* The CS8900A ethernet chip has its I/O registers wired to chip select 2 */
 * The CS8900A ethernet chip has its I/O registers wired to chip select 2
#define AUTCPU12_PHYS_CS8900A		CS2_PHYS_BASE
 * (nCS2). This is the mapping for it.
 */
#define AUTCPU12_PHYS_CS8900A		CS2_PHYS_BASE		/* physical */
#define AUTCPU12_VIRT_CS8900A		(0xfe000000)		/* virtual */


/*
/*
 * The flash bank is wired to chip select 0
 * The flash bank is wired to chip select 0
@@ -34,11 +30,9 @@


/* offset for device specific information structure */
/* offset for device specific information structure */
#define AUTCPU12_LCDINFO_OFFS		(0x00010000)	
#define AUTCPU12_LCDINFO_OFFS		(0x00010000)	
/*

* Videomemory is the internal SRAM (CS 6)	
/* Videomemory in the internal SRAM (CS 6) */
*/
#define AUTCPU12_PHYS_VIDEO		CS6_PHYS_BASE
#define AUTCPU12_PHYS_VIDEO		CS6_PHYS_BASE
#define AUTCPU12_VIRT_VIDEO		(0xfd000000)


/*
/*
* All special IO's are tied to CS1
* All special IO's are tied to CS1
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