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Commit 6caeece9 authored by Saravana Kannan's avatar Saravana Kannan
Browse files

devfreq: Add MSM CPUfreq governor 



The MSM CPUfreq devfreq governor determines the CPU to DDR bandwidth vote
based on the current CPU frequency of all the active CPUs.

This functionality used to be a part of the MSM CPUfreq driver that
directly voted for the CPU to DDR bandwidth using MSM bus scaling APIs.
This refactor decouples CPU to DDR BW scaling from CPU frequency and allows
switch between various CPU BW governors.

The bandwidth values in the msm-cpufreq table have to be updated since the
new CPU BW driver does the MBps to Bps conversion correctly. The MSM
CPUfreq driver used to do * 1000 * 1000 to convert from MBps to Bps instead
of doing * 1024 * 1024.

Change-Id: I184f09d628a1b27d52506d2f760d65831f1a1110
Signed-off-by: default avatarSaravana Kannan <skannan@codeaurora.org>
parent a2dd9de8

Documentation/devicetree/bindings/arm/msm/msm-cpufreq.txt

+2 −10
Original line number Diff line number Diff line
@@ -9,23 +9,15 @@ Required properties: 
- compatible:		Must be "qcom,msm-cpufreq"

- qcom,cpufreq-table:	A list of tuples where each tuple consists of a

			usable CPU frequency (KHz), an optional cache

			frequency (KHz) and an optional memory bandwidth

			frequency (KHz) and a mandatory memory bandwidth

			value (MBPS) listed in that order.  The cache

			frequencies shall not be listed if the device cannot

			run the cache asynchronous to one or more CPUs. The

			memory bandwidth values shall not be listed if the

			optional cpu-mem-ports property is not supplied.



Optional properties:

- qcom,cpu-mem-ports:	A list of tuples where each tuple consists of a bus

			master (CPU) port number and a bus slave (memory)

			port number.

			run the cache asynchronous to one or more CPUs.



Example:

	qcom,msm-cpufreq@0 {

		regs = <0 4>

		compatible = "qcom,msm-cpufreq";

		qcom,cpu-mem-ports = <1 512>, <2 513>;

		qcom,cpufreq-table =

			<  300000  300000  600 >,

			<  422400  422400 1200 >,

arch/arm/boot/dts/qti/apq8084.dtsi

+30 −16
Original line number Diff line number Diff line
@@ -1785,26 +1785,40 @@ 
			< 2265600000  950000  726 >;

	};



	qcom,cpubw {

		compatible = "qcom,cpubw";

		qcom,cpu-mem-ports = <1 512>;

		qcom,bw-tbl =

			<  1144 /*   75 MHz */ >,

			<  2288 /*  150 MHz */ >,

			<  3051 /*  200 MHz */ >,

			<  4974 /*  326 MHz */ >,

			<  5996 /*  393 MHz */ >,

			<  8056 /*  528 MHz */ >,

			< 10101 /*  662 MHz */ >,

			< 12145 /*  796 MHz */ >,

			< 16250 /* 1065 MHz */ >;

	};



	qcom,msm-cpufreq@0 {

		reg = <0 4>;

		compatible = "qcom,msm-cpufreq";

		qcom,cpu-mem-ports = <1 512>;

		qcom,cpufreq-table =

			<  300000  300000  1200 /*  75 MHz */ >,

			<  422400  422400  2400 /* 150 MHz */ >,

			<  652800  499200  3200 /* 200 MHz */ >,

			<  729600  576000  5216 /* 326 MHz */ >,

			<  883200  576000  6288 /* 393 MHz */ >,

			<  960000  960000  8448 /* 528 MHz */ >,

			< 1036800 1036800  8448 /* 528 MHz */ >,

			< 1190400 1036800  8448 /* 528 MHz */ >,

			< 1267200 1267200 10592 /* 662 MHz */ >,

			< 1497600 1497600 10592 /* 662 MHz */ >,

			< 1574400 1574400 12736 /* 796 MHz */ >,

			< 1728000 1651200 12736 /* 796 MHz */ >,

			< 1958400 1728000 17040 /* 1065 MHz */ >,

			< 2265600 1728000 17040 /* 1065 MHz */ >,

			< 2457600 1728000 17040 /* 1065 MHz */ >;

			<  300000  300000  1144 >,

			<  422400  422400  2288 >,

			<  652800  499200  3051 >,

			<  729600  576000  4974 >,

			<  883200  576000  5996 >,

			<  960000  960000  8056 >,

			< 1036800 1036800  8056 >,

			< 1190400 1036800  8056 >,

			< 1267200 1267200 10101 >,

			< 1497600 1497600 10101 >,

			< 1574400 1574400 12145 >,

			< 1728000 1651200 12145 >,

			< 1958400 1728000 16250 >,

			< 2265600 1728000 16250 >,

			< 2457600 1728000 16250 >;

	};



	usb_otg: usb@f9a55000 {

arch/arm/boot/dts/qti/fsm9900.dtsi

+23 −13
Original line number Diff line number Diff line
@@ -566,23 +566,33 @@ 
				"tsens_tz_sensor5", "tsens_tz_sensor6";

	};



	qcom,cpubw {

		compatible = "qcom,cpubw";

		qcom,cpu-mem-ports = <1 512>, <2 512>;

		qcom,bw-tbl =

			<  572 /*  75 MHz */ >,

			< 1144 /* 150 MHz */ >,

			< 2342 /* 307 MHz */ >,

			< 3509 /* 460 MHz */ >,

			< 6103 /* 800 MHz */ >;

	};



	qcom,msm-cpufreq@0 {

		reg = <0 4>;

		compatible = "qcom,msm-cpufreq";

		qcom,cpu-mem-ports = <1 512>, <2 512>;

		qcom,cpufreq-table =

			<  300000  300000  600 /*  75 MHz */ >,

			<  422400  422400 1200 /* 150 MHz */ >,

			<  576000  576000 2456 /* 307 MHz */ >,

			<  729600  729600 2456 /* 307 MHz */ >,

			<  883200  883200 2456 /* 307 MHz */ >,

			< 1036800 1036800 3680 /* 460 MHz */ >,

			< 1190400 1190400 3680 /* 460 MHz */ >,

			< 1344000 1344000 6400 /* 800 MHz */ >,

			< 1497600 1497600 6400 /* 800 MHz */ >,

			< 1651200 1651200 6400 /* 800 MHz */ >,

			< 1804800 1651200 6400 /* 800 MHz */ >,

			< 1958400 1651200 6400 /* 800 MHz */ >;

			<  300000  300000  572 >,

			<  422400  422400 1144 >,

			<  576000  576000 2342 >,

			<  729600  729600 2342 >,

			<  883200  883200 2342 >,

			< 1036800 1036800 3509 >,

			< 1190400 1190400 3509 >,

			< 1344000 1344000 6103 >,

			< 1497600 1497600 6103 >,

			< 1651200 1651200 6103 >,

			< 1804800 1651200 6103 >,

			< 1958400 1651200 6103 >;

	};



	qcom,clock-krait@f9016000 {

arch/arm/boot/dts/qti/msm8226.dtsi

+22 −13
Original line number Diff line number Diff line
@@ -1057,23 +1057,32 @@ 
		cpu-vdd-supply = <&apc_vreg_corner>;

	};



	qcom,cpubw {

		compatible = "qcom,cpubw";

		qcom,cpu-mem-ports = <1 512>;

		qcom,bw-tbl =

			< 1525 /* 200 MHz */ >,

			< 2441 /* 320 MHz */ >,

			< 3051 /* 400 MHz */ >,

			< 4066 /* 533 MHz */ >;

	};



	qcom,msm-cpufreq@0 {

		reg = <0 4>;

		compatible = "qcom,msm-cpufreq";

		qcom,cpu-mem-ports = <1 512>;

		qcom,cpufreq-table =

			<  300000 1600 /* 200 MHz */ >,

			<  384000 1600 /* 200 MHz */ >,

			<  600000 1600 /* 200 MHz */ >,

			<  787200 3200 /* 400 MHz */ >,

			<  998400 4264 /* 533 MHz */ >,

			< 1094400 4264 /* 533 MHz */ >,

			< 1190400 4264 /* 533 MHz */ >,

			< 1305600 4264 /* 533 MHz */ >,

			< 1344000 4264 /* 533 MHz */ >,

			< 1401600 4264 /* 533 MHz */ >,

			< 1497600 4264 /* 533 MHz */ >,

			< 1593600 4264 /* 533 MHz */ >;

			<  300000 1525 >,

			<  384000 1525 >,

			<  600000 1525 >,

			<  787200 3051 >,

			<  998400 4066 >,

			< 1094400 4066 >,

			< 1190400 4066 >,

			< 1305600 4066 >,

			< 1344000 4066 >,

			< 1401600 4066 >,

			< 1497600 4066 >,

			< 1593600 4066 >;

	};



	qcom,ocmem@fdd00000 {

arch/arm/boot/dts/qti/msm8610.dtsi

+15 −7
Original line number Diff line number Diff line
@@ -552,17 +552,25 @@ 
		cpu-vdd-supply = <&apc_vreg_corner>;

	};



	qcom,cpubw {

		compatible = "qcom,cpubw";

		qcom,cpu-mem-ports = <1 512>;

		qcom,bw-tbl =

			<  762 /* 100 MHz */ >,

			< 1525 /* 200 MHz */ >,

			< 2540 /* 333 MHz */ >;

	};



	qcom,msm-cpufreq@0 {

		reg = <0 4>;

		compatible = "qcom,msm-cpufreq";

		qcom,cpu-mem-ports = <1 512>;

		qcom,cpufreq-table =

			<  300000  800 /* 100 MHz */ >,

			<  384000  800 /* 100 MHz */ >,

			<  600000 1600 /* 200 MHz */ >,

			<  787200 1600 /* 200 MHz */ >,

			<  998400 2664 /* 333 MHz */ >,

			< 1190400 2664 /* 333 MHz */ >;

			<  300000  762 >,

			<  384000  762 >,

			<  600000 1525 >,

			<  787200 1525 >,

			<  998400 2540 >,

			< 1190400 2540 >;

	};



	spmi_bus: qcom,spmi@fc4c0000 {