Loading arch/arm/boot/dts/qcom/msm8992.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -1784,7 +1784,7 @@ "restart_reg"; clocks = <&clock_rpm clk_cxo_clk_src>, <&clock_gcc clk_gcc_mss_cfg_ahb_clk>, <&clock_rpm clk_mss_cfg_ahb_clk>, <&clock_rpm clk_pnoc_modem_clk>, <&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>, <&clock_gcc clk_gcc_boot_rom_ahb_clk>, Loading drivers/clk/qcom/clock-gcc-8992.c +1 −15 Original line number Diff line number Diff line /* Copyright (c) 2014, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -65,7 +65,6 @@ static DEFINE_VDD_REGULATORS(vdd_dig, VDD_DIG_NUM, 1, vdd_corner, NULL); #define GPLL0_MODE (0x0000) #define SYS_NOC_USB3_AXI_CBCR (0x03FC) #define MSS_CFG_AHB_CBCR (0x0280) #define MSS_Q6_BIMC_AXI_CBCR (0x0284) #define USB_30_BCR (0x03C0) #define USB30_MASTER_CBCR (0x03C8) Loading Loading @@ -1838,17 +1837,6 @@ static struct branch_clk gcc_gp3_clk = { }, }; static struct branch_clk gcc_mss_cfg_ahb_clk = { .cbcr_reg = MSS_CFG_AHB_CBCR, .has_sibling = 1, .base = &virt_base, .c = { .dbg_name = "gcc_mss_cfg_ahb_clk", .ops = &clk_ops_branch, CLK_INIT(gcc_mss_cfg_ahb_clk.c), }, }; static struct branch_clk gcc_mss_q6_bimc_axi_clk = { .cbcr_reg = MSS_Q6_BIMC_AXI_CBCR, .has_sibling = 0, Loading Loading @@ -2249,7 +2237,6 @@ static struct mux_clk gcc_debug_mux = { { &debug_mmss_clk.c, 0x002b }, { &debug_rpm_clk.c, 0xffff }, { &gcc_sys_noc_usb3_axi_clk.c, 0x0006 }, { &gcc_mss_cfg_ahb_clk.c, 0x0030 }, { &gcc_mss_q6_bimc_axi_clk.c, 0x0031 }, { &gcc_usb30_master_clk.c, 0x0050 }, { &gcc_usb30_sleep_clk.c, 0x0051 }, Loading Loading @@ -2434,7 +2421,6 @@ static struct clk_lookup msm_clocks_gcc_8992[] = { CLK_LIST(gcc_gp1_clk), CLK_LIST(gcc_gp2_clk), CLK_LIST(gcc_gp3_clk), CLK_LIST(gcc_mss_cfg_ahb_clk), CLK_LIST(gcc_mss_q6_bimc_axi_clk), CLK_LIST(gcc_pcie_0_aux_clk), CLK_LIST(gcc_pcie_0_cfg_ahb_clk), Loading drivers/clk/qcom/clock-rpm-8992.c +9 −1 Original line number Diff line number Diff line /* Copyright (c) 2014, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -32,6 +32,7 @@ #define RPM_MEM_CLK_TYPE 0x326b6c63 #define RPM_IPA_CLK_TYPE 0x617069 #define RPM_CE_CLK_TYPE 0x6563 #define RPM_MCFG_CLK_TYPE 0x6766636d #define RPM_SMD_KEY_ENABLE 0x62616E45 Loading @@ -52,6 +53,8 @@ #define CE1_CLK_ID 0x0 #define CE2_CLK_ID 0x1 #define MSS_CFG_AHB_CLK_ID 0x0 #define BB_CLK1_ID 0x1 #define BB_CLK2_ID 0x2 #define RF_CLK1_ID 0x4 Loading Loading @@ -103,6 +106,8 @@ DEFINE_CLK_RPM_SMD(ipa_clk, ipa_a_clk, RPM_IPA_CLK_TYPE, DEFINE_CLK_RPM_SMD_XO_BUFFER(ln_bb_clk, ln_bb_a_clk, LN_BB_CLK_ID); DEFINE_CLK_RPM_SMD(mmssnoc_ahb_clk, mmssnoc_ahb_a_clk, RPM_BUS_CLK_TYPE, MMSSNOC_AHB_CLK_ID, NULL); DEFINE_CLK_RPM_SMD_BRANCH(mss_cfg_ahb_clk, mss_cfg_ahb_a_clk, RPM_MCFG_CLK_TYPE, MSS_CFG_AHB_CLK_ID, 19200000); static DEFINE_CLK_VOTER(ocmemgx_core_clk, &ocmemgx_clk.c, INT_MAX); static DEFINE_CLK_VOTER(ocmemgx_msmbus_clk, &ocmemgx_clk.c, INT_MAX); static DEFINE_CLK_VOTER(ocmemgx_msmbus_a_clk, &ocmemgx_a_clk.c, INT_MAX); Loading Loading @@ -156,6 +161,7 @@ static struct mux_clk rpm_debug_mux = { { &pnoc_clk.c, 0x0010 }, { &snoc_clk.c, 0x0000 }, { &bimc_clk.c, 0x015c }, { &mss_cfg_ahb_clk.c, 0x0030 }, { &gcc_mmss_bimc_gfx_m_clk.c, 0x002c }, { &ce1_clk.c, 0x0138 }, { &gcc_ce1_axi_m_clk.c, 0x0139 }, Loading Loading @@ -220,6 +226,8 @@ static struct clk_lookup msm_clocks_rpm_8992[] = { CLK_LIST(mcd_ce2_clk), CLK_LIST(mmssnoc_ahb_clk), CLK_LIST(mmssnoc_ahb_a_clk), CLK_LIST(mss_cfg_ahb_clk), CLK_LIST(mss_cfg_ahb_a_clk), CLK_LIST(ocmemgx_core_clk), CLK_LIST(ocmemgx_msmbus_clk), CLK_LIST(ocmemgx_msmbus_a_clk), Loading include/dt-bindings/clock/msm-clocks-8992.h +3 −2 Original line number Diff line number Diff line /* Copyright (c) 2014, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -62,6 +62,8 @@ #define clk_mcd_ce2_clk 0x6ed5c723 #define clk_mmssnoc_ahb_clk 0xccd4bd4c #define clk_mmssnoc_ahb_a_clk 0x3f1a62ce #define clk_mss_cfg_ahb_clk 0x4a6d85ae #define clk_mss_cfg_ahb_a_clk 0x2a1502ca #define clk_ocmemgx_core_clk 0xaad7dbe5 #define clk_ocmemgx_msmbus_clk 0x3968c738 #define clk_ocmemgx_msmbus_a_clk 0x66dd774f Loading Loading @@ -211,7 +213,6 @@ #define clk_gcc_gp1_clk 0x057f7b69 #define clk_gcc_gp2_clk 0x9bf83ffd #define clk_gcc_gp3_clk 0xec6539ee #define clk_gcc_mss_cfg_ahb_clk 0x111cde81 #define clk_gcc_mss_q6_bimc_axi_clk 0x67544d62 #define clk_gcc_pcie_0_aux_clk 0x3d2e3ece #define clk_gcc_pcie_0_cfg_ahb_clk 0x4dd325c3 Loading Loading
arch/arm/boot/dts/qcom/msm8992.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -1784,7 +1784,7 @@ "restart_reg"; clocks = <&clock_rpm clk_cxo_clk_src>, <&clock_gcc clk_gcc_mss_cfg_ahb_clk>, <&clock_rpm clk_mss_cfg_ahb_clk>, <&clock_rpm clk_pnoc_modem_clk>, <&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>, <&clock_gcc clk_gcc_boot_rom_ahb_clk>, Loading
drivers/clk/qcom/clock-gcc-8992.c +1 −15 Original line number Diff line number Diff line /* Copyright (c) 2014, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -65,7 +65,6 @@ static DEFINE_VDD_REGULATORS(vdd_dig, VDD_DIG_NUM, 1, vdd_corner, NULL); #define GPLL0_MODE (0x0000) #define SYS_NOC_USB3_AXI_CBCR (0x03FC) #define MSS_CFG_AHB_CBCR (0x0280) #define MSS_Q6_BIMC_AXI_CBCR (0x0284) #define USB_30_BCR (0x03C0) #define USB30_MASTER_CBCR (0x03C8) Loading Loading @@ -1838,17 +1837,6 @@ static struct branch_clk gcc_gp3_clk = { }, }; static struct branch_clk gcc_mss_cfg_ahb_clk = { .cbcr_reg = MSS_CFG_AHB_CBCR, .has_sibling = 1, .base = &virt_base, .c = { .dbg_name = "gcc_mss_cfg_ahb_clk", .ops = &clk_ops_branch, CLK_INIT(gcc_mss_cfg_ahb_clk.c), }, }; static struct branch_clk gcc_mss_q6_bimc_axi_clk = { .cbcr_reg = MSS_Q6_BIMC_AXI_CBCR, .has_sibling = 0, Loading Loading @@ -2249,7 +2237,6 @@ static struct mux_clk gcc_debug_mux = { { &debug_mmss_clk.c, 0x002b }, { &debug_rpm_clk.c, 0xffff }, { &gcc_sys_noc_usb3_axi_clk.c, 0x0006 }, { &gcc_mss_cfg_ahb_clk.c, 0x0030 }, { &gcc_mss_q6_bimc_axi_clk.c, 0x0031 }, { &gcc_usb30_master_clk.c, 0x0050 }, { &gcc_usb30_sleep_clk.c, 0x0051 }, Loading Loading @@ -2434,7 +2421,6 @@ static struct clk_lookup msm_clocks_gcc_8992[] = { CLK_LIST(gcc_gp1_clk), CLK_LIST(gcc_gp2_clk), CLK_LIST(gcc_gp3_clk), CLK_LIST(gcc_mss_cfg_ahb_clk), CLK_LIST(gcc_mss_q6_bimc_axi_clk), CLK_LIST(gcc_pcie_0_aux_clk), CLK_LIST(gcc_pcie_0_cfg_ahb_clk), Loading
drivers/clk/qcom/clock-rpm-8992.c +9 −1 Original line number Diff line number Diff line /* Copyright (c) 2014, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -32,6 +32,7 @@ #define RPM_MEM_CLK_TYPE 0x326b6c63 #define RPM_IPA_CLK_TYPE 0x617069 #define RPM_CE_CLK_TYPE 0x6563 #define RPM_MCFG_CLK_TYPE 0x6766636d #define RPM_SMD_KEY_ENABLE 0x62616E45 Loading @@ -52,6 +53,8 @@ #define CE1_CLK_ID 0x0 #define CE2_CLK_ID 0x1 #define MSS_CFG_AHB_CLK_ID 0x0 #define BB_CLK1_ID 0x1 #define BB_CLK2_ID 0x2 #define RF_CLK1_ID 0x4 Loading Loading @@ -103,6 +106,8 @@ DEFINE_CLK_RPM_SMD(ipa_clk, ipa_a_clk, RPM_IPA_CLK_TYPE, DEFINE_CLK_RPM_SMD_XO_BUFFER(ln_bb_clk, ln_bb_a_clk, LN_BB_CLK_ID); DEFINE_CLK_RPM_SMD(mmssnoc_ahb_clk, mmssnoc_ahb_a_clk, RPM_BUS_CLK_TYPE, MMSSNOC_AHB_CLK_ID, NULL); DEFINE_CLK_RPM_SMD_BRANCH(mss_cfg_ahb_clk, mss_cfg_ahb_a_clk, RPM_MCFG_CLK_TYPE, MSS_CFG_AHB_CLK_ID, 19200000); static DEFINE_CLK_VOTER(ocmemgx_core_clk, &ocmemgx_clk.c, INT_MAX); static DEFINE_CLK_VOTER(ocmemgx_msmbus_clk, &ocmemgx_clk.c, INT_MAX); static DEFINE_CLK_VOTER(ocmemgx_msmbus_a_clk, &ocmemgx_a_clk.c, INT_MAX); Loading Loading @@ -156,6 +161,7 @@ static struct mux_clk rpm_debug_mux = { { &pnoc_clk.c, 0x0010 }, { &snoc_clk.c, 0x0000 }, { &bimc_clk.c, 0x015c }, { &mss_cfg_ahb_clk.c, 0x0030 }, { &gcc_mmss_bimc_gfx_m_clk.c, 0x002c }, { &ce1_clk.c, 0x0138 }, { &gcc_ce1_axi_m_clk.c, 0x0139 }, Loading Loading @@ -220,6 +226,8 @@ static struct clk_lookup msm_clocks_rpm_8992[] = { CLK_LIST(mcd_ce2_clk), CLK_LIST(mmssnoc_ahb_clk), CLK_LIST(mmssnoc_ahb_a_clk), CLK_LIST(mss_cfg_ahb_clk), CLK_LIST(mss_cfg_ahb_a_clk), CLK_LIST(ocmemgx_core_clk), CLK_LIST(ocmemgx_msmbus_clk), CLK_LIST(ocmemgx_msmbus_a_clk), Loading
include/dt-bindings/clock/msm-clocks-8992.h +3 −2 Original line number Diff line number Diff line /* Copyright (c) 2014, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -62,6 +62,8 @@ #define clk_mcd_ce2_clk 0x6ed5c723 #define clk_mmssnoc_ahb_clk 0xccd4bd4c #define clk_mmssnoc_ahb_a_clk 0x3f1a62ce #define clk_mss_cfg_ahb_clk 0x4a6d85ae #define clk_mss_cfg_ahb_a_clk 0x2a1502ca #define clk_ocmemgx_core_clk 0xaad7dbe5 #define clk_ocmemgx_msmbus_clk 0x3968c738 #define clk_ocmemgx_msmbus_a_clk 0x66dd774f Loading Loading @@ -211,7 +213,6 @@ #define clk_gcc_gp1_clk 0x057f7b69 #define clk_gcc_gp2_clk 0x9bf83ffd #define clk_gcc_gp3_clk 0xec6539ee #define clk_gcc_mss_cfg_ahb_clk 0x111cde81 #define clk_gcc_mss_q6_bimc_axi_clk 0x67544d62 #define clk_gcc_pcie_0_aux_clk 0x3d2e3ece #define clk_gcc_pcie_0_cfg_ahb_clk 0x4dd325c3 Loading