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Commit 6c2fa897 authored Jan 16, 2014 by Gilad Avidov

ARM: dts: msm: Combine double configuration of same i2c



A single i2c core has two entries in the same DT as bus-numbers
1 and 3. Both are combined as bus number 1.

Change-Id: Ib4839a1a8bec8a5941b5a345713aabd33ae8ce24
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>

parent 51f18552

arch/arm/boot/dts/qcom/mdm9630.dtsi

+7 −20

Original line number	Diff line number	Diff line
		@@ -268,22 +268,6 @@
		<0>, <0>, <0>, <0>;
		};

		i2c_1: i2c@f9925000 { /* BLSP1 QUP3 */
		cell-index = <1>;
		compatible = "qcom,i2c-qup";
		#address-cells = <1>;
		#size-cells = <0>;
		reg-names = "qup_phys_addr";
		reg = <0xf9925000 0x1000>;
		interrupt-names = "qup_err_intr";
		interrupts = <0 97 0>;
		qcom,i2c-bus-freq = <100000>;
		qcom,i2c-src-freq = <19200000>;
		qcom,sda-gpio = <&msmgpio 10 0>;
		qcom,scl-gpio = <&msmgpio 11 0>;
		qcom,master-id = <86>;
		};

		spi_2: spi@f9924000 { /* BLSP1 QUP2 */
		compatible = "qcom,spi-qup-v2";
		#address-cells = <1>;
		@@ -788,17 +772,20 @@
		interrupt-names = "cdc-int";
		};

		i2c@f9925000 {
		cell-index = <3>;
		i2c_1: i2c@f9925000 { /* BLSP1 QUP3 */
		cell-index = <1>;
		compatible = "qcom,i2c-qup";
		reg = <0xf9925000 0x1000>;
		#address-cells = <1>;
		#size-cells = <0>;
		reg-names = "qup_phys_addr";
		interrupts = <0 97 0>;
		reg = <0xf9925000 0x1000>;
		interrupt-names = "qup_err_intr";
		interrupts = <0 97 0>;
		qcom,i2c-bus-freq = <100000>;
		qcom,i2c-src-freq = <19200000>;
		qcom,sda-gpio = <&msmgpio 10 0>;
		qcom,scl-gpio = <&msmgpio 11 0>;
		qcom,master-id = <86>;

		wcd9xxx_codec@d{
		compatible = "qcom,wcd9xxx-i2c";