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Commit 6bca069b authored by Ke Liu's avatar Ke Liu
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msm: cpr-regulator: change cpr_read_efuse_row api



Add a flag in cpr_read_efuse_row api to make it choose
to read register directly or read through SCM.

Change-Id: I3031dfd1c7cfffb880c49e5f1708b1436fdd2897
Signed-off-by: default avatarKe Liu <keliu@codeaurora.org>
parent d0a400d7
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+33 −20
Original line number Diff line number Diff line
@@ -56,38 +56,50 @@ Required properties:
- qti,cpr-gcnt-time:		The time for gate count in microseconds.
- qti,cpr-apc-volt-step:	The voltage in microvolt per CPR step, such as 5000uV.

- qti,pvs-fuse-redun-sel:	Array of 4 elements to indicate where to read the bits and what value to
- qti,pvs-fuse-redun-sel:	Array of 5 elements to indicate where to read the bits, what value to
				compare with in order to decide if the redundant PVS fuse bits would be
				used instead of the original bits. The 4 elements with index [0..3] are:
				used instead of the original bits and method to read fuse row, reading
				register through SCM or directly. The 5 elements with index [0..4] are:
				  [0] => the fuse row number of the selector
				  [1] => LSB bit position of the bits
				  [2] => number of bits
				  [3] => the value to indicate redundant selection
				  [4] => fuse reading method, 0 for direct reading or 1 for SCM reading
				When the value of the fuse bits specified by first 3 elements equals to
				the value in 4th element, redundant PVS fuse bits should be selected.
				Otherwise, the original PVS bits should be selected.
- qti,pvs-fuse:		Array of three elements to indicate the bits for PVS fuse. The array
				should have index and value like this:
				Otherwise, the original PVS bits should be selected. If the 5th
				element is 0, read the fuse row from register directly. Otherwise,
				read it through SCM.
- qti,pvs-fuse:			Array of 4 elements to indicate the bits for PVS fuse and read method.
				The array should have index and value like this:
				  [0] => the PVS fuse row number
				  [1] => LSB bit position of the bits
				  [2] => number of bits
- qti,pvs-fuse-redun:		Array of three elements to indicate the bits for redundant PVS fuse.
				  [3] => fuse reading method, 0 for direct reading or 1 for SCM reading
- qti,pvs-fuse-redun:		Array of 4 elements to indicate the bits for redundant PVS fuse.
				The array should have index and value like this:
				  [0] => the redundant PVS fuse row number
				  [1] => LSB bit position of the bits
				  [2] => number of bits

- qti,cpr-fuse-redun-sel:	Array of 4 elements to indicate where to read the bits and what value to
				  [3] => fuse reading method, 0 for direct reading or 1 for SCM reading
- qti,cpr-fuse-redun-sel:	Array of 5 elements to indicate where to read the bits, what value to
				compare with in order to decide if the redundant CPR fuse bits would be
				used instead of the original bits. The 4 elements with index [0..3] are:
				used instead of the original bits and method to read fuse row, using SCM
				to read or read register directly. The 5 elements with index [0..4] are:
				  [0] => the fuse row number of the selector
				  [1] => LSB bit position of the bits
				  [2] => number of bits
				  [3] => the value to indicate redundant selection
				  [4] => fuse reading method, 0 for direct reading or 1 for SCM reading
				When the value of the fuse bits specified by first 3 elements equals to
				the value in 4th element, redundant CPR fuse bits should be selected.
				Otherwise, the original CPR bits should be selected.
- qti,cpr-fuse-row:		Row number of CPR fuse
				Otherwise, the original CPR bits should be selected. If the 5th element
				is 0, read the fuse row from register directly. Otherwise, read it through
				SCM.
- qti,cpr-fuse-row:		Array of row number of CPR fuse and method to read that row. It should have
				index and value like this:
				 [0] => the fuse row number
				 [1] => fuse reading method, 0 for direct reading or 1 for SCM reading
- qti,cpr-fuse-bp-cpr-disable:	Bit position of the bit to indicate if CPR should be disable
- qti,cpr-fuse-bp-scheme:	Bit position of the bit to indicate if it's a global/local scheme
- qti,cpr-fuse-target-quot:	Array of bit positions in fuse for Target Quotient of all corners.
@@ -100,7 +112,10 @@ Required properties:
				  [0] => bit position of the LSB bit for SVS RO select bits
				  [1] => bit position of the LSB bit for NOMINAL RO select bits
				  [2] => bit position of the LSB bit for TURBO RO select bits
- qti,cpr-fuse-redun-row:	Row number of the redundant CPR fuse
- qti,cpr-fuse-redun-row:	Array of row number of redundant CPR fuse and method to read that
				row. It should have index and value like this:
				 [0] => the redundant fuse row number
				 [1] => the value to indicate reading the fuse row directly or using SCM
- qti,cpr-fuse-redun-target-quot:	Array of bit positions in fuse for redundant Target Quotient of all corners.
				It should have index and value like this:
				  [0] => bit position of the LSB bit for redundant SVS target quotient
@@ -132,8 +147,6 @@ Optional properties:
					is present, and vise versa.
- qti,cpr-enable:		Present: CPR enabled by default.
				Not Present: CPR disable by default.
- qti,use-tz-api:		Present: CPR reads efuse parameters through trustzone API.
				Not Present: CPR reads efuse parameters directly.


Example:
@@ -147,9 +160,9 @@ Example:
		regulator-min-microvolt = <1>;
		regulator-max-microvolt = <3>;

		qti,pvs-fuse = <22 6 5>;
		qti,pvs-fuse-redun-sel = <22 24 3 2>;
		qti,pvs-fuse-redun = <22 27 5>;
		qti,pvs-fuse = <22 6 5 1>;
		qti,pvs-fuse-redun-sel = <22 24 3 2 1>;
		qti,pvs-fuse-redun = <22 27 5 1>;

		qti,pvs-init-voltage = <1330000 1330000 1330000 1320000
						1310000 1300000 1290000 1280000
@@ -180,13 +193,13 @@ Example:
		qti,cpr-gcnt-time = <1>;
		qti,cpr-apc-volt-step = <5000>;

		qti,cpr-fuse-row = <138>;
		qti,cpr-fuse-row = <138 1>;
		qti,cpr-fuse-bp-cpr-disable = <36>;
		qti,cpr-fuse-bp-scheme = <37>;
		qti,cpr-fuse-target-quot = <24 12 0>;
		qti,cpr-fuse-ro-sel = <54 38 41>;
		qti,cpr-fuse-redun-sel = <138 57 1 1>;
		qti,cpr-fuse-redun-row = <139>;
		qti,cpr-fuse-redun-sel = <138 57 1 1 1>;
		qti,cpr-fuse-redun-row = <139 1>;
		qti,cpr-fuse-redun-target-quot = <24 12 0>;
		qti,cpr-fuse-redun-ro-sel = <46 36 39>;
	};
+6 −6
Original line number Diff line number Diff line
@@ -37,9 +37,9 @@
		regulator-min-microvolt = <1>;
		regulator-max-microvolt = <3>;

		qti,pvs-fuse-redun-sel = <22 24 3 2>;
		qti,pvs-fuse = <22 6 5>;
		qti,pvs-fuse-redun = <22 27 5>;
		qti,pvs-fuse-redun-sel = <22 24 3 2 0>;
		qti,pvs-fuse = <22 6 5 0>;
		qti,pvs-fuse-redun = <22 27 5 0>;

		qti,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
					1275000 1260000 1245000 1230000 1215000
@@ -71,13 +71,13 @@
		qti,vdd-apc-step-down-limit = <1>;
		qti,cpr-apc-volt-step = <5000>;

		qti,cpr-fuse-redun-sel = <138 57 1 1>;
		qti,cpr-fuse-row = <138>;
		qti,cpr-fuse-redun-sel = <138 57 1 1 0>;
		qti,cpr-fuse-row = <138 0>;
		qti,cpr-fuse-bp-cpr-disable = <36>;
		qti,cpr-fuse-bp-scheme = <37>;
		qti,cpr-fuse-target-quot = <24 12 0>;
		qti,cpr-fuse-ro-sel = <54 38 41>;
		qti,cpr-fuse-redun-row = <139>;
		qti,cpr-fuse-redun-row = <139 0>;
		qti,cpr-fuse-redun-target-quot = <24 12 0>;
		qti,cpr-fuse-redun-ro-sel = <46 36 39>;

+6 −7
Original line number Diff line number Diff line
@@ -38,9 +38,9 @@
		regulator-min-microvolt = <1>;
		regulator-max-microvolt = <3>;

		qti,pvs-fuse-redun-sel = <53 25 3 2>;
		qti,pvs-fuse = <23 6 5>;
		qti,pvs-fuse-redun = <61 47 5>;
		qti,pvs-fuse-redun-sel = <53 25 3 2 1>;
		qti,pvs-fuse = <23 6 5 1>;
		qti,pvs-fuse-redun = <61 47 5 1>;

		qti,pvs-init-voltage = <1275000 1275000 1275000 1275000 1275000
					1275000 1275000 1275000 1275000 1275000
@@ -72,20 +72,19 @@
		qti,vdd-apc-step-down-limit = <1>;
		qti,cpr-apc-volt-step = <5000>;

		qti,cpr-fuse-redun-sel = <53 25 3 2>;
		qti,cpr-fuse-row = <61>;
		qti,cpr-fuse-redun-sel = <53 25 3 2 1>;
		qti,cpr-fuse-row = <61 1>;
		qti,cpr-fuse-bp-cpr-disable = <39>;
		qti,cpr-fuse-bp-scheme = <40>;
		qti,cpr-fuse-target-quot = <27 15 3>;
		qti,cpr-fuse-ro-sel = <47 41 44>;
		qti,cpr-fuse-redun-row = <52>;
		qti,cpr-fuse-redun-row = <52 1>;
		qti,cpr-fuse-redun-bp-cpr-disable = <24>;
		qti,cpr-fuse-redun-bp-scheme = <25>;
		qti,cpr-fuse-redun-target-quot = <32 12 0>;
		qti,cpr-fuse-redun-ro-sel = <44 26 29>;

		qti,cpr-enable;
		qti,use-tz-api;
	};
};

+29 −31
Original line number Diff line number Diff line
@@ -162,9 +162,6 @@ struct cpr_regulator {
	u32		pvs_bin;
	u32		process;

	/* Control parameter to read efuse parameters by trustzone API */
	bool		use_tz_api;

	/* APC voltage regulator */
	struct regulator	*vdd_apc;

@@ -237,7 +234,8 @@ module_param_named(debug_enable, cpr_debug_enable, int, S_IRUGO | S_IWUSR);
	} while (0)


static u64 cpr_read_efuse_row(struct cpr_regulator *cpr_vreg, u32 row_num)
static u64 cpr_read_efuse_row(struct cpr_regulator *cpr_vreg, u32 row_num,
				bool use_tz_api)
{
	int rc;
	u64 efuse_bits;
@@ -251,7 +249,7 @@ static u64 cpr_read_efuse_row(struct cpr_regulator *cpr_vreg, u32 row_num)
		u32 status;
	} rsp;

	if (cpr_vreg->use_tz_api != true) {
	if (!use_tz_api) {
		efuse_bits = readq_relaxed(cpr_vreg->efuse_base
			+ row_num * BYTES_PER_FUSE_ROW);
		return efuse_bits;
@@ -974,12 +972,12 @@ static int cpr_config(struct cpr_regulator *cpr_vreg)
}

static int cpr_is_fuse_redundant(struct cpr_regulator *cpr_vreg,
					 u32 redun_sel[4])
					 u32 redun_sel[5])
{
	u64 fuse_bits;
	int redundant;

	fuse_bits = cpr_read_efuse_row(cpr_vreg, redun_sel[0]);
	fuse_bits = cpr_read_efuse_row(cpr_vreg, redun_sel[0], redun_sel[4]);
	fuse_bits = (fuse_bits >> redun_sel[1]) & ((1 << redun_sel[2]) - 1);
	if (fuse_bits == redun_sel[3])
		redundant = 1;
@@ -998,13 +996,13 @@ static int cpr_pvs_init(struct platform_device *pdev,
	struct device_node *of_node = pdev->dev.of_node;
	u64 efuse_bits;
	int rc, process;
	u32 pvs_fuse[3], pvs_fuse_redun_sel[4];
	u32 pvs_fuse[4], pvs_fuse_redun_sel[5];
	u32 init_v;
	bool redundant;
	size_t pvs_bins;

	rc = of_property_read_u32_array(of_node, "qti,pvs-fuse-redun-sel",
					pvs_fuse_redun_sel, 4);
					pvs_fuse_redun_sel, 5);
	if (rc < 0) {
		pr_err("pvs-fuse-redun-sel missing: rc=%d\n", rc);
		return rc;
@@ -1014,14 +1012,14 @@ static int cpr_pvs_init(struct platform_device *pdev,

	if (redundant) {
		rc = of_property_read_u32_array(of_node, "qti,pvs-fuse-redun",
						pvs_fuse, 3);
						pvs_fuse, 4);
		if (rc < 0) {
			pr_err("pvs-fuse-redun missing: rc=%d\n", rc);
			return rc;
		}
	} else {
		rc = of_property_read_u32_array(of_node, "qti,pvs-fuse",
						pvs_fuse, 3);
						pvs_fuse, 4);
		if (rc < 0) {
			pr_err("pvs-fuse missing: rc=%d\n", rc);
			return rc;
@@ -1030,7 +1028,7 @@ static int cpr_pvs_init(struct platform_device *pdev,

	/* Construct PVS process # from the efuse bits */

	efuse_bits = cpr_read_efuse_row(cpr_vreg, pvs_fuse[0]);
	efuse_bits = cpr_read_efuse_row(cpr_vreg, pvs_fuse[0], pvs_fuse[3]);
	cpr_vreg->pvs_bin = (efuse_bits >> pvs_fuse[1]) &
				   ((1 << pvs_fuse[2]) - 1);

@@ -1149,9 +1147,9 @@ static int cpr_init_cpr_efuse(struct platform_device *pdev,
	struct device_node *of_node = pdev->dev.of_node;
	int i, rc = 0;
	bool redundant;
	u32 cpr_fuse_redun_sel[4];
	u32 cpr_fuse_redun_sel[5];
	char *targ_quot_str, *ro_sel_str;
	u32 cpr_fuse_row;
	u32 cpr_fuse_row[2];
	u32 bp_cpr_disable, bp_scheme;
	int bp_target_quot[CPR_CORNER_MAX];
	int bp_ro_sel[CPR_CORNER_MAX];
@@ -1159,7 +1157,7 @@ static int cpr_init_cpr_efuse(struct platform_device *pdev,
	u64 fuse_bits, fuse_bits_2;

	rc = of_property_read_u32_array(of_node, "qti,cpr-fuse-redun-sel",
					cpr_fuse_redun_sel, 4);
					cpr_fuse_redun_sel, 5);
	if (rc < 0) {
		pr_err("cpr-fuse-redun-sel missing: rc=%d\n", rc);
		return rc;
@@ -1168,13 +1166,15 @@ static int cpr_init_cpr_efuse(struct platform_device *pdev,
	redundant = cpr_is_fuse_redundant(cpr_vreg, cpr_fuse_redun_sel);

	if (redundant) {
		CPR_PROP_READ_U32(of_node, "cpr-fuse-redun-row",
				  &cpr_fuse_row, rc);
		rc = of_property_read_u32_array(of_node,
				"qti,cpr-fuse-redun-row",
				cpr_fuse_row, 2);
		targ_quot_str = "qti,cpr-fuse-redun-target-quot";
		ro_sel_str = "qti,cpr-fuse-redun-ro-sel";
	} else {
		CPR_PROP_READ_U32(of_node, "cpr-fuse-row",
				  &cpr_fuse_row, rc);
		rc = of_property_read_u32_array(of_node,
				"qti,cpr-fuse-row",
				cpr_fuse_row, 2);
		targ_quot_str = "qti,cpr-fuse-target-quot";
		ro_sel_str = "qti,cpr-fuse-ro-sel";
	}
@@ -1200,8 +1200,9 @@ static int cpr_init_cpr_efuse(struct platform_device *pdev,
	}

	/* Read the control bits of eFuse */
	fuse_bits = cpr_read_efuse_row(cpr_vreg, cpr_fuse_row);
	pr_info("[row:%d] = 0x%llx\n", cpr_fuse_row, fuse_bits);
	fuse_bits = cpr_read_efuse_row(cpr_vreg, cpr_fuse_row[0],
					cpr_fuse_row[1]);
	pr_info("[row:%d] = 0x%llx\n", cpr_fuse_row[0], fuse_bits);

	if (redundant) {
		if (of_property_read_bool(of_node,
@@ -1216,21 +1217,23 @@ static int cpr_init_cpr_efuse(struct platform_device *pdev,
				return rc;
			fuse_bits_2 = fuse_bits;
		} else {
			u32 temp_row;
			u32 temp_row[2];

			/* Use original fuse if no optional property */
			CPR_PROP_READ_U32(of_node, "cpr-fuse-bp-cpr-disable",
					  &bp_cpr_disable, rc);
			CPR_PROP_READ_U32(of_node, "cpr-fuse-bp-scheme",
					  &bp_scheme, rc);
			CPR_PROP_READ_U32(of_node, "cpr-fuse-row",
					  &temp_row, rc);
			rc = of_property_read_u32_array(of_node,
					"qti,cpr-fuse-row",
					temp_row, 2);
			if (rc)
				return rc;

			fuse_bits_2 = cpr_read_efuse_row(cpr_vreg, temp_row);
			fuse_bits_2 = cpr_read_efuse_row(cpr_vreg, temp_row[0],
							temp_row[1]);
			pr_info("[original row:%d] = 0x%llx\n",
				temp_row, fuse_bits_2);
				temp_row[0], fuse_bits_2);
		}
	} else {
		CPR_PROP_READ_U32(of_node, "cpr-fuse-bp-cpr-disable",
@@ -1453,11 +1456,6 @@ static int cpr_efuse_init(struct platform_device *pdev,
		return -EINVAL;
	}

	if (of_property_read_bool(pdev->dev.of_node, "qti,use-tz-api"))
		cpr_vreg->use_tz_api = true;
	else
		cpr_vreg->use_tz_api = false;

	return 0;
}