Loading arch/arm/boot/dts/qcom/msm8226.dtsi +3 −1 Original line number Diff line number Diff line Loading @@ -1022,7 +1022,7 @@ qcom,i2c-bus-freq = <400000>; qcom,i2c-src-freq = <19200000>; }; i2c@f9926000 { /* BLSP-1 QUP-4 */ i2c_0: i2c@f9926000 { /* BLSP-1 QUP-4 */ cell-index = <0>; compatible = "qcom,i2c-qup"; reg = <0xf9926000 0x1000>; Loading @@ -1032,6 +1032,8 @@ interrupts = <0 98 0>; interrupt-names = "qup_err_intr"; qcom,i2c-bus-freq = <100000>; qcom,i2c-src-freq = <19200000>; qcom,master-id = <86>; }; i2c@f9927000 { /* BLSP1 QUP5 */ Loading arch/arm/boot/dts/qcom/msm8926.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -28,6 +28,11 @@ <224 0x10001>; }; &i2c_0 { qcom,sda-gpio = <&msmgpio 14 0>; qcom,scl-gpio = <&msmgpio 15 0>; }; &soc { qcom,mss@fc880000 { reg = <0xfc880000 0x100>, Loading Loading
arch/arm/boot/dts/qcom/msm8226.dtsi +3 −1 Original line number Diff line number Diff line Loading @@ -1022,7 +1022,7 @@ qcom,i2c-bus-freq = <400000>; qcom,i2c-src-freq = <19200000>; }; i2c@f9926000 { /* BLSP-1 QUP-4 */ i2c_0: i2c@f9926000 { /* BLSP-1 QUP-4 */ cell-index = <0>; compatible = "qcom,i2c-qup"; reg = <0xf9926000 0x1000>; Loading @@ -1032,6 +1032,8 @@ interrupts = <0 98 0>; interrupt-names = "qup_err_intr"; qcom,i2c-bus-freq = <100000>; qcom,i2c-src-freq = <19200000>; qcom,master-id = <86>; }; i2c@f9927000 { /* BLSP1 QUP5 */ Loading
arch/arm/boot/dts/qcom/msm8926.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -28,6 +28,11 @@ <224 0x10001>; }; &i2c_0 { qcom,sda-gpio = <&msmgpio 14 0>; qcom,scl-gpio = <&msmgpio 15 0>; }; &soc { qcom,mss@fc880000 { reg = <0xfc880000 0x100>, Loading