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Commit 688de62e authored by Junjie Wu's avatar Junjie Wu
Browse files

msm: clock-8974: Change SDCC1 frequencies for MSM8974Pro AC 



200MHz is replaced by 192MHz for SDCC1 on MSM8974Pro AC. Update SW
frequency table to match the new clock plan.

Change-Id: I5a3c066d0edec51a0bea5e95ce73fb0f3237539f
Signed-off-by: default avatarJunjie Wu <junjiew@codeaurora.org>
parent 01364e16

arch/arm/mach-msm/clock-8974.c

+19 −1
Original line number Diff line number Diff line
@@ -1558,6 +1558,24 @@ static struct rcg_clk pdm2_clk_src = { 
	},

};



/* This table is for MSM8974Pro AC SDCC1 */

static struct clk_freq_tbl ftbl_gcc_sdcc1_apps_clk_ac[] = {

	F(   144000,    cxo,  16,   3,  25),

	F(   400000,    cxo,  12,   1,   4),

	F( 20000000,  gpll0,  15,   1,   2),

	F( 25000000,  gpll0,  12,   1,   2),

	F( 50000000,  gpll0,  12,   0,   0),

	F(100000000,  gpll0,   6,   0,   0),

	F(192000000,  gpll4,   4,   0,   0),

	F(384000000,  gpll4,   2,   0,   0),

	F_END

};



/*

 * This table is for:

 * 1) SDCC[1-4] on MSM8974Pro AB, MSM8974 v2 and before

 * 2) SDCC[2-4] on MSM8974Pro AC

 */

static struct clk_freq_tbl ftbl_gcc_sdcc1_4_apps_clk[] = {

	F(   144000,    cxo,  16,   3,  25),

	F(   400000,    cxo,  12,   1,   4),
@@ -1566,7 +1584,6 @@ static struct clk_freq_tbl ftbl_gcc_sdcc1_4_apps_clk[] = { 
	F( 50000000,  gpll0,  12,   0,   0),

	F(100000000,  gpll0,   6,   0,   0),

	F(200000000,  gpll0,   3,   0,   0),

	F(384000000,  gpll4,   2,   0,   0),

	F_END

};
@@ -5697,6 +5714,7 @@ static void __init msm8974_pro_clock_override(void) 
	if (cpu_is_msm8974pro_ac()) {

		sdcc1_apps_clk_src.c.fmax[VDD_DIG_LOW] = 200000000;

		sdcc1_apps_clk_src.c.fmax[VDD_DIG_NOMINAL] = 400000000;

		sdcc1_apps_clk_src.freq_tbl = ftbl_gcc_sdcc1_apps_clk_ac;

	}



	vfe0_clk_src.c.fmax[VDD_DIG_LOW] = 150000000;