Commit 6830e0cf authored Oct 20, 2014 by Vikram Mulukutla

ARM: dts: msm: Switch the CPU PLLs to the MX rail on MSM8994V2



The four A53 and A57 cluster PLLs are powered by the
MX domain on MSM8994V2.

Change-Id: I3954ccb086a3f0b9679f795c157580dcfaaa6a0d
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>

parent 299a6262

arch/arm/boot/dts/qcom/msm8994-v2.dtsi

+1 −0

Original line number	Diff line number	Diff line
		@@ -79,6 +79,7 @@

		&clock_cpu {
		compatible = "qcom,cpu-clock-8994-v2";
		vdd-dig-supply = <&pm8994_s2_corner_ao>;
		qcom,a53-speedbin0-v0 =
		< 0 0>,
		< 300000000 2>,