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Commit 672f7ac6 authored by AnilKumar Chimata's avatar AnilKumar Chimata Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Update crypto ab and ib values for 8916/39



By default qcrypto driver is requesting for higher BW which falls
in turbo mode, so power numbers are higher. This patch request the
BW with the values which fall onto nominal mode.

Change-Id: Ib39aafc69c207616ccbbafc2b4a8b9f9186c3e9d
Signed-off-by: default avatarAnilKumar Chimata <anilc@codeaurora.org>
parent df5046b7
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+1 −1
Original line number Original line Diff line number Diff line
@@ -707,7 +707,7 @@
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
		qcom,msm-bus,vectors-KBps =
				<55 512 0 0>,
				<55 512 0 0>,
				<55 512 3936000 393600>;
				<55 512 393600 800000>; /* 49.2MHz & 100MHz */
		clocks = <&clock_gcc clk_crypto_clk_src>,
		clocks = <&clock_gcc clk_crypto_clk_src>,
			 <&clock_gcc clk_gcc_crypto_clk>,
			 <&clock_gcc clk_gcc_crypto_clk>,
			 <&clock_gcc clk_gcc_crypto_ahb_clk>,
			 <&clock_gcc clk_gcc_crypto_ahb_clk>,
+2 −2
Original line number Original line Diff line number Diff line
@@ -676,7 +676,7 @@
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
		qcom,msm-bus,vectors-KBps =
				<55 512 0 0>,
				<55 512 0 0>,
				<55 512 787200 1600000>; /* 49.2MHz & 100MHz */
				<55 512 393600 800000>; /* 49.2MHz & 100MHz */
		clocks = <&clock_gcc clk_crypto_clk_src>,
		clocks = <&clock_gcc clk_crypto_clk_src>,
			 <&clock_gcc clk_gcc_crypto_clk>,
			 <&clock_gcc clk_gcc_crypto_clk>,
			 <&clock_gcc clk_gcc_crypto_ahb_clk>,
			 <&clock_gcc clk_gcc_crypto_ahb_clk>,
@@ -706,7 +706,7 @@
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
		qcom,msm-bus,vectors-KBps =
				<55 512 0 0>,
				<55 512 0 0>,
				<55 512 3936000 393600>;
				<55 512 393600 800000>; /* 49.2MHz & 100MHz */
		clocks = <&clock_gcc clk_crypto_clk_src>,
		clocks = <&clock_gcc clk_crypto_clk_src>,
			 <&clock_gcc clk_gcc_crypto_clk>,
			 <&clock_gcc clk_gcc_crypto_clk>,
			 <&clock_gcc clk_gcc_crypto_ahb_clk>,
			 <&clock_gcc clk_gcc_crypto_ahb_clk>,