Loading arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +2 −4 Original line number Original line Diff line number Diff line Loading @@ -577,6 +577,7 @@ qcom,corner-acc-map = <1 1 0 0>; qcom,corner-acc-map = <1 1 0 0>; qcom,acc-sel-l1-bit-pos = <0>; qcom,acc-sel-l1-bit-pos = <0>; qcom,acc-sel-l1-bit-size = <1>; qcom,acc-sel-l1-bit-size = <1>; status = "disabled"; }; }; mem_acc1_vreg_corner: mem-acc1-regulator { mem_acc1_vreg_corner: mem-acc1-regulator { Loading @@ -589,6 +590,7 @@ qcom,corner-acc-map = <1 1 0 0>; qcom,corner-acc-map = <1 1 0 0>; qcom,acc-sel-l1-bit-pos = <1>; qcom,acc-sel-l1-bit-pos = <1>; qcom,acc-sel-l1-bit-size = <1>; qcom,acc-sel-l1-bit-size = <1>; status = "disabled"; }; }; apc0_vreg_corner: regulator@f9019000 { apc0_vreg_corner: regulator@f9019000 { Loading @@ -610,8 +612,6 @@ qcom,vdd-mx-vmin-method = <4>; qcom,vdd-mx-vmin-method = <4>; vdd-mx-supply = <&pm8994_s2_corner_ao>; vdd-mx-supply = <&pm8994_s2_corner_ao>; mem-acc-supply = <&mem_acc0_vreg_corner>; qcom,cpr-ref-clk = <19200>; qcom,cpr-ref-clk = <19200>; qcom,cpr-timer-delay = <5000>; qcom,cpr-timer-delay = <5000>; qcom,cpr-timer-cons-up = <0>; qcom,cpr-timer-cons-up = <0>; Loading Loading @@ -706,8 +706,6 @@ qcom,vdd-mx-vmin-method = <4>; qcom,vdd-mx-vmin-method = <4>; vdd-mx-supply = <&pm8994_s2_corner_ao>; vdd-mx-supply = <&pm8994_s2_corner_ao>; mem-acc-supply = <&mem_acc1_vreg_corner>; qcom,cpr-ref-clk = <19200>; qcom,cpr-ref-clk = <19200>; qcom,cpr-timer-delay = <5000>; qcom,cpr-timer-delay = <5000>; qcom,cpr-timer-cons-up = <0>; qcom,cpr-timer-cons-up = <0>; Loading Loading
arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +2 −4 Original line number Original line Diff line number Diff line Loading @@ -577,6 +577,7 @@ qcom,corner-acc-map = <1 1 0 0>; qcom,corner-acc-map = <1 1 0 0>; qcom,acc-sel-l1-bit-pos = <0>; qcom,acc-sel-l1-bit-pos = <0>; qcom,acc-sel-l1-bit-size = <1>; qcom,acc-sel-l1-bit-size = <1>; status = "disabled"; }; }; mem_acc1_vreg_corner: mem-acc1-regulator { mem_acc1_vreg_corner: mem-acc1-regulator { Loading @@ -589,6 +590,7 @@ qcom,corner-acc-map = <1 1 0 0>; qcom,corner-acc-map = <1 1 0 0>; qcom,acc-sel-l1-bit-pos = <1>; qcom,acc-sel-l1-bit-pos = <1>; qcom,acc-sel-l1-bit-size = <1>; qcom,acc-sel-l1-bit-size = <1>; status = "disabled"; }; }; apc0_vreg_corner: regulator@f9019000 { apc0_vreg_corner: regulator@f9019000 { Loading @@ -610,8 +612,6 @@ qcom,vdd-mx-vmin-method = <4>; qcom,vdd-mx-vmin-method = <4>; vdd-mx-supply = <&pm8994_s2_corner_ao>; vdd-mx-supply = <&pm8994_s2_corner_ao>; mem-acc-supply = <&mem_acc0_vreg_corner>; qcom,cpr-ref-clk = <19200>; qcom,cpr-ref-clk = <19200>; qcom,cpr-timer-delay = <5000>; qcom,cpr-timer-delay = <5000>; qcom,cpr-timer-cons-up = <0>; qcom,cpr-timer-cons-up = <0>; Loading Loading @@ -706,8 +706,6 @@ qcom,vdd-mx-vmin-method = <4>; qcom,vdd-mx-vmin-method = <4>; vdd-mx-supply = <&pm8994_s2_corner_ao>; vdd-mx-supply = <&pm8994_s2_corner_ao>; mem-acc-supply = <&mem_acc1_vreg_corner>; qcom,cpr-ref-clk = <19200>; qcom,cpr-ref-clk = <19200>; qcom,cpr-timer-delay = <5000>; qcom,cpr-timer-delay = <5000>; qcom,cpr-timer-cons-up = <0>; qcom,cpr-timer-cons-up = <0>; Loading