Merge "msm: smem: Use "qti" device tree vendor prefix"

Qualcomm Shared Memory

MSM Shared Memory

[Root level node]

Required properties:

-compatible : should be "qcom,smem"

-compatible : should be "qti,smem"

-reg : the location and size of smem, the irq register base memory, and

	optionally any auxiliary smem areas

-reg-names : "smem" - string to identify the shared memory region

			identify any auxiliary shared memory regions

Optional properties:

-mpu-enabled : boolean value indicating that Memory Protection Unit based

-qti,mpu-enabled : boolean value indicating that Memory Protection Unit based

	security is enabled on the "smem" shared memory region

[Second level nodes]

qcom,smd

qti,smd

Required properties:

-compatible : should be "qcom,smd"

-qcom,smd-edge : the smd edge

-qcom,smd-irq-offset : the offset into the irq register base memory for sending

-compatible : should be "qti,smd"

-qti,smd-edge : the smd edge

-qti,smd-irq-offset : the offset into the irq register base memory for sending

	interrupts

-qcom,smd-irq-bitmask : the sending irq bitmask

-qti,smd-irq-bitmask : the sending irq bitmask

-interrupts : the receiving interrupt line

-label : the name of the remote subsystem for this edge

Optional properties:

-qcom,irq-no-suspend: configure the incoming irq line as active during suspend

-qcom,not-loadable : indicates this processor cannot be loaded by PIL

-qti,irq-no-suspend: configure the incoming irq line as active during suspend

-qti,not-loadable : indicates this processor cannot be loaded by PIL

qcom,smsm

qti,smsm

Required properties:

-compatible : should be "qcom,smsm"

-qcom,smsm-edge : the smsm edge

-qcom,smsm-irq-offset : the offset into the irq register base memory for sending

-compatible : should be "qti,smsm"

-qti,smsm-edge : the smsm edge

-qti,smsm-irq-offset : the offset into the irq register base memory for sending

	interrupts

-qcom,smsm-irq-bitmask : the sending irq bitmask

-qti,smsm-irq-bitmask : the sending irq bitmask

-interrupts : the receiving interrupt line

Example:

	qcom,smem@fa00000 {

		compatible = "qcom,smem";

	qti,smem@fa00000 {

		compatible = "qti,smem";

		reg = <0xfa00000 0x200000>,

			<0xfa006000 0x1000>,

			<0xfc428000 0x4000>;

		reg-names = "smem", "irq-reg-base", "aux-mem1";

		qcom,smd-modem {

			compatible = "qcom,smd";

			qcom,smd-edge = <0>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x1000>;

		qti,smd-modem {

			compatible = "qti,smd";

			qti,smd-edge = <0>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x1000>;

			interrupts = <0 25 1>;

			label = "modem";

		};

		qcom,smsm-modem {

			compatible = "qcom,smsm";

			qcom,smsm-edge = <0>;

			qcom,smsm-irq-offset = <0x8>;

			qcom,smsm-irq-bitmask = <0x2000>;

		qti,smsm-modem {

			compatible = "qti,smsm";

			qti,smsm-edge = <0>;

			qti,smsm-irq-offset = <0x8>;

			qti,smsm-irq-bitmask = <0x2000>;

			interrupts = <0 26 1>;

		};

		qcom,smd-adsp {

			compatible = "qcom,smd";

			qcom,smd-edge = <1>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x100>;

		qti,smd-adsp {

			compatible = "qti,smd";

			qti,smd-edge = <1>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x100>;

			interrupts = <0 156 1>;

			label = "adsp";

		};

		qcom,smsm-adsp {

			compatible = "qcom,smsm";

			qcom,smsm-edge = <1>;

			qcom,smsm-irq-offset = <0x8>;

			qcom,smsm-irq-bitmask = <0x200>;

		qti,smsm-adsp {

			compatible = "qti,smsm";

			qti,smsm-edge = <1>;

			qti,smsm-irq-offset = <0x8>;

			qti,smsm-irq-bitmask = <0x200>;

			interrupts = <0 157 1>;

		};

		qcom,smd-wcnss {

			compatible = "qcom,smd";

			qcom,smd-edge = <6>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x20000>;

		qti,smd-wcnss {

			compatible = "qti,smd";

			qti,smd-edge = <6>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x20000>;

			interrupts = <0 142 1>;

			label = "wcnss";

		};

		qcom,smsm-wcnss {

			compatible = "qcom,smsm";

			qcom,smsm-edge = <6>;

			qcom,smsm-irq-offset = <0x8>;

			qcom,smsm-irq-bitmask = <0x80000>;

		qti,smsm-wcnss {

			compatible = "qti,smsm";

			qti,smsm-edge = <6>;

			qti,smsm-irq-offset = <0x8>;

			qti,smsm-irq-bitmask = <0x80000>;

			interrupts = <0 144 1>;

		};

		qcom,smd-rpm {

			compatible = "qcom,smd";

			qcom,smd-edge = <15>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x1>;

		qti,smd-rpm {

			compatible = "qti,smd";

			qti,smd-edge = <15>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x1>;

			interrupts = <0 168 1>;

			label = "rpm";

			qcom,irq-no-syspend;

			qcom,not-loadable;

			qti,irq-no-syspend;

			qti,not-loadable;

		};

	};

		qcom,num-locks = <8>;

	};

	qcom,smem@fa00000 {

		compatible = "qcom,smem";

	qti,smem@fa00000 {

		compatible = "qti,smem";

		reg = <0xfa00000 0x200000>,

			<0xf9011000 0x1000>,

			<0xfc428000 0x4000>;

		reg-names = "smem", "irq-reg-base", "aux-mem1";

		mpu-enabled;

		qcom,smd-adsp {

			compatible = "qcom,smd";

			qcom,smd-edge = <1>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x100>;

			qcom,pil-string = "adsp";

		qti,mpu-enabled;

		qti,smd-adsp {

			compatible = "qti,smd";

			qti,smd-edge = <1>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x100>;

			qti,pil-string = "adsp";

			interrupts = <0 156 1>;

		};

		qcom,smsm-adsp {

			compatible = "qcom,smsm";

			qcom,smsm-edge = <1>;

			qcom,smsm-irq-offset = <0x8>;

			qcom,smsm-irq-bitmask = <0x200>;

		qti,smsm-adsp {

			compatible = "qti,smsm";

			qti,smsm-edge = <1>;

			qti,smsm-irq-offset = <0x8>;

			qti,smsm-irq-bitmask = <0x200>;

			interrupts = <0 157 1>;

		};

		qcom,smd-rpm {

			compatible = "qcom,smd";

			qcom,smd-edge = <15>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x1>;

		qti,smd-rpm {

			compatible = "qti,smd";

			qti,smd-edge = <15>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x1>;

			interrupts = <0 168 1>;

			qcom,irq-no-suspend;

			qti,irq-no-suspend;

		};

	};

		status = "disabled";

	};

	qcom,smem@1c100000 {

		compatible = "qcom,smem";

	qti,smem@1c100000 {

		compatible = "qti,smem";

		reg = <0x1c100000 0x200000>,

			<0xf9011000 0x1000>;

		reg-names = "smem", "irq-reg-base";

		qcom,smd-hex0 {

			compatible = "qcom,smd";

			qcom,smd-edge = <0>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x100>;

		qti,smd-hex0 {

			compatible = "qti,smd";

			qti,smd-edge = <0>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x100>;

			interrupts = <0 72 1>;

			label = "hex0";

			qcom,not-loadable;

			qti,not-loadable;

		};

		qcom,smd-hex1 {

			compatible = "qcom,smd";

			qcom,smd-edge = <6>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x1000>;

		qti,smd-hex1 {

			compatible = "qti,smd";

			qti,smd-edge = <6>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x1000>;

			interrupts = <0 68 1>;

			label = "hex1";

			qcom,not-loadable;

			qti,not-loadable;

		};

		qcom,smd-hex2 {

			compatible = "qcom,smd";

			qcom,smd-edge = <1>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x10000>;

		qti,smd-hex2 {

			compatible = "qti,smd";

			qti,smd-edge = <1>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x10000>;

			interrupts = <0 64 1>;

			label = "hex2";

			qcom,not-loadable;

			qti,not-loadable;

		};

		qcom,smd-hex3 {

			compatible = "qcom,smd";

			qcom,smd-edge = <3>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x100000>;

		qti,smd-hex3 {

			compatible = "qti,smd";

			qti,smd-edge = <3>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x100000>;

			interrupts = <0 60 1>;

			label = "hex3";

			qcom,not-loadable;

			qti,not-loadable;

		};

		qcom,smd-tenx {

			compatible = "qcom,smd";

			qcom,smd-edge = <10>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x10>;

		qti,smd-tenx {

			compatible = "qti,smd";

			qti,smd-edge = <10>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x10>;

			interrupts = <0 26 1>;

			label = "tenx";

			qcom,not-loadable;

			qti,not-loadable;

		};

	};

		qcom,num-locks = <8>;

	};

	qcom,smem@fa00000 {

		compatible = "qcom,smem";

	qti,smem@fa00000 {

		compatible = "qti,smem";

		reg = <0xfa00000 0x200000>,

			<0xf9011000 0x1000>,

			<0xfc428000 0x4000>;

		reg-names = "smem", "irq-reg-base", "aux-mem1";

		qcom,smd-adsp {

			compatible = "qcom,smd";

			qcom,smd-edge = <1>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x100>;

			qcom,pil-string = "adsp";

		qti,smd-adsp {

			compatible = "qti,smd";

			qti,smd-edge = <1>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x100>;

			qti,pil-string = "adsp";

			interrupts = <0 156 1>;

		};

		qcom,smsm-adsp {

			compatible = "qcom,smsm";

			qcom,smsm-edge = <1>;

			qcom,smsm-irq-offset = <0x8>;

			qcom,smsm-irq-bitmask = <0x200>;

		qti,smsm-adsp {

			compatible = "qti,smsm";

			qti,smsm-edge = <1>;

			qti,smsm-irq-offset = <0x8>;

			qti,smsm-irq-bitmask = <0x200>;

			interrupts = <0 157 1>;

		};

		qcom,smd-rpm {

			compatible = "qcom,smd";

			qcom,smd-edge = <15>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x1>;

		qti,smd-rpm {

			compatible = "qti,smd";

			qti,smd-edge = <15>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x1>;

			interrupts = <0 168 1>;

			qcom,irq-no-suspend;

			qti,irq-no-suspend;

		};

	};

		qcom,ipi-ping;

	};

	qcom,smem@fa00000 {

		compatible = "qcom,smem";

	qti,smem@fa00000 {

		compatible = "qti,smem";

		reg = <0xfa00000 0x100000>,

			<0xf9011000 0x1000>,

			<0xfc428000 0x4000>;

		reg-names = "smem", "irq-reg-base", "aux-mem1";

		mpu-enabled;

		qcom,smd-modem {

			compatible = "qcom,smd";

			qcom,smd-edge = <0>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x1000>;

			qcom,pil-string = "modem";

		qti,mpu-enabled;

		qti,smd-modem {

			compatible = "qti,smd";

			qti,smd-edge = <0>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x1000>;

			qti,pil-string = "modem";

			interrupts = <0 25 1>;

		};

		qcom,smsm-modem {

			compatible = "qcom,smsm";

			qcom,smsm-edge = <0>;

			qcom,smsm-irq-offset = <0x8>;

			qcom,smsm-irq-bitmask = <0x2000>;

		qti,smsm-modem {

			compatible = "qti,smsm";

			qti,smsm-edge = <0>;

			qti,smsm-irq-offset = <0x8>;

			qti,smsm-irq-bitmask = <0x2000>;

			interrupts = <0 26 1>;

		};

		qcom,smd-adsp {

			compatible = "qcom,smd";

			qcom,smd-edge = <1>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x100>;

			qcom,pil-string = "adsp";

		qti,smd-adsp {

			compatible = "qti,smd";

			qti,smd-edge = <1>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x100>;

			qti,pil-string = "adsp";

			interrupts = <0 156 1>;

		};

		qcom,smsm-adsp {

			compatible = "qcom,smsm";

			qcom,smsm-edge = <1>;

			qcom,smsm-irq-offset = <0x8>;

			qcom,smsm-irq-bitmask = <0x200>;

		qti,smsm-adsp {

			compatible = "qti,smsm";

			qti,smsm-edge = <1>;

			qti,smsm-irq-offset = <0x8>;

			qti,smsm-irq-bitmask = <0x200>;

			interrupts = <0 157 1>;

		};

		qcom,smd-wcnss {

			compatible = "qcom,smd";

			qcom,smd-edge = <6>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x20000>;

			qcom,pil-string = "wcnss";

		qti,smd-wcnss {

			compatible = "qti,smd";

			qti,smd-edge = <6>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x20000>;

			qti,pil-string = "wcnss";

			interrupts = <0 142 1>;

		};

		qcom,smsm-wcnss {

			compatible = "qcom,smsm";

			qcom,smsm-edge = <6>;

			qcom,smsm-irq-offset = <0x8>;

			qcom,smsm-irq-bitmask = <0x80000>;

		qti,smsm-wcnss {

			compatible = "qti,smsm";

			qti,smsm-edge = <6>;

			qti,smsm-irq-offset = <0x8>;

			qti,smsm-irq-bitmask = <0x80000>;

			interrupts = <0 144 1>;

		};

		qcom,smd-rpm {

			compatible = "qcom,smd";

			qcom,smd-edge = <15>;

			qcom,smd-irq-offset = <0x8>;

			qcom,smd-irq-bitmask = <0x1>;

		qti,smd-rpm {

			compatible = "qti,smd";

			qti,smd-edge = <15>;

			qti,smd-irq-offset = <0x8>;

			qti,smd-irq-bitmask = <0x1>;

			interrupts = <0 168 1>;

			qcom,irq-no-suspend;

			qti,irq-no-suspend;

		};

	};