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Commit 642b92c8 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "arm: dts: Clock changes to avoid race conditions"

parents 4e5f2f63 6d67541e
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+15 −13
Original line number Diff line number Diff line
@@ -35,7 +35,7 @@
			"csiphy_timer_src_clk", "csiphy_timer_clk",
			"camss_ahb_src", "csi_phy_clk",
			"camss_ahb_clk";
		qcom,clock-rates = <0 0 200000000 0 0 0 0>;
		qcom,clock-rates = <0 80000000 200000000 0 0 0 0>;
	};

	qcom,csiphy@1b0b000 {
@@ -57,7 +57,7 @@
			"csiphy_timer_src_clk", "csiphy_timer_clk",
			"camss_ahb_src", "csi_phy_clk",
			"camss_ahb_clk";
		qcom,clock-rates = <0 0 200000000 0 0 0 0>;
		qcom,clock-rates = <0 80000000 200000000 0 0 0 0>;
	};

	qcom,csid@1b08000  {
@@ -81,7 +81,7 @@
			"ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk",
			"csi_clk",  "csi_pix_clk",
			"csi_rdi_clk", "camss_ahb_clk";
		qcom,clock-rates = <0 0 0 200000000 0 0 0 0>;
		qcom,clock-rates = <0 80000000 0 200000000 0 0 0 0>;
     };

	qcom,csid@1b08400 {
@@ -105,7 +105,7 @@
			"ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk",
			"csi_clk", "csi_pix_clk",
			"csi_rdi_clk", "camss_ahb_clk";
		qcom,clock-rates = <0 0 0 200000000 0 0 0 0>;
		qcom,clock-rates = <0 80000000 0 200000000 0 0 0 0>;
	};

	qcom,csid@1b08800 {
@@ -129,7 +129,7 @@
			"ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk",
			"csi_clk", "csi_pix_clk",
			"csi_rdi_clk", "camss_ahb_clk";
		qcom,clock-rates = <0 0 0 200000000 0 0 0 0>;
		qcom,clock-rates = <0 80000000 0 200000000 0 0 0 0>;
	};

	qcom,ispif@1b0a000 {
@@ -173,7 +173,7 @@
			"csi3_rdi_clk", "vfe0_clk_src", "camss_vfe_vfe0_clk",
			"camss_csi_vfe0_clk","vfe1_clk_src","camss_vfe_vfe1_clk",
			"camss_csi_vfe1_clk";
		qcom,clock-rates = <0 0>;
		qcom,clock-rates = <80000000 0>;
	};

	qcom,vfe@1b10000 {
@@ -191,11 +191,12 @@
			<&clock_gcc clk_gcc_camss_csi_vfe0_clk>,
			<&clock_gcc clk_gcc_camss_vfe_ahb_clk>,
			<&clock_gcc clk_gcc_camss_vfe_axi_clk>,
			<&clock_gcc clk_gcc_camss_ahb_clk>;
			<&clock_gcc clk_gcc_camss_ahb_clk>,
			<&clock_gcc clk_gcc_camss_ispif_ahb_clk>;
		clock-names = "camss_top_ahb_clk", "vfe_clk_src",
			"camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk",
			"bus_clk", "camss_ahb_clk";
		qcom,clock-rates = <0 266670000 0 0 0 0 0>;
			"bus_clk", "camss_ahb_clk", "ispif_ahb_clk";
		qcom,clock-rates = <0 266670000 0 0 0 0 0 80000000>;
		};

	qcom,jpeg@1b1c000 {
@@ -243,12 +244,13 @@
			<&clock_gcc clk_gcc_camss_cpp_ahb_clk>,
			<&clock_gcc clk_gcc_camss_vfe_axi_clk>,
			<&clock_gcc clk_gcc_camss_micro_ahb_clk>,
			<&clock_gcc clk_gcc_camss_ahb_clk>;
			<&clock_gcc clk_gcc_camss_ahb_clk>,
			<&clock_gcc clk_gcc_camss_ispif_ahb_clk>;
		clock-names = "camss_top_ahb_clk", "vfe_clk_src",
			"camss_vfe_vfe_clk", "iface_clk", "cpp_core_clk",
			"cpp_iface_clk", "cpp_bus_clk", "micro_iface_clk",
			"camss_ahb_clk";
		qcom,clock-rates = <0 320000000 0 80000000 320000000 0 0 0 0>;
			"camss_ahb_clk", "ispif_ahb_clk";
		qcom,clock-rates = <0 320000000 0 0 320000000 0 0 0 0 80000000>;
	};

	cci: qcom,cci@1b0c000 {
@@ -267,7 +269,7 @@
			<&clock_gcc clk_gcc_camss_ahb_clk>;
		clock-names = "camss_top_ahb_clk", "cci_src_clk",
			"cci_ahb_clk", "cci_clk", "camss_ahb_clk";
		qcom,clock-rates = <0 19200000 80000000 0 0>;
		qcom,clock-rates = <0 19200000 0 0 0>;
		pinctrl-names = "cci_default", "cci_suspend";
		pinctrl-0 = <&cci0_default>;
		pinctrl-1 = <&cci0_sleep>;