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Commit 64203b67 authored by Dan Williams's avatar Dan Williams
Browse files

mv_xor: implement a private tx_list



Drop mv_xor's use of tx_list from struct dma_async_tx_descriptor in
preparation for removal of this field.

Cc: Saeed Bishara <saeed@marvell.com>
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent ea25968a
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+4 −3
Original line number Original line Diff line number Diff line
@@ -517,7 +517,7 @@ retry:
			}
			}
			alloc_tail->group_head = alloc_start;
			alloc_tail->group_head = alloc_start;
			alloc_tail->async_tx.cookie = -EBUSY;
			alloc_tail->async_tx.cookie = -EBUSY;
			list_splice(&chain, &alloc_tail->async_tx.tx_list);
			list_splice(&chain, &alloc_tail->tx_list);
			mv_chan->last_used = last_used;
			mv_chan->last_used = last_used;
			mv_desc_clear_next_desc(alloc_start);
			mv_desc_clear_next_desc(alloc_start);
			mv_desc_clear_next_desc(alloc_tail);
			mv_desc_clear_next_desc(alloc_tail);
@@ -565,14 +565,14 @@ mv_xor_tx_submit(struct dma_async_tx_descriptor *tx)
	cookie = mv_desc_assign_cookie(mv_chan, sw_desc);
	cookie = mv_desc_assign_cookie(mv_chan, sw_desc);


	if (list_empty(&mv_chan->chain))
	if (list_empty(&mv_chan->chain))
		list_splice_init(&sw_desc->async_tx.tx_list, &mv_chan->chain);
		list_splice_init(&sw_desc->tx_list, &mv_chan->chain);
	else {
	else {
		new_hw_chain = 0;
		new_hw_chain = 0;


		old_chain_tail = list_entry(mv_chan->chain.prev,
		old_chain_tail = list_entry(mv_chan->chain.prev,
					    struct mv_xor_desc_slot,
					    struct mv_xor_desc_slot,
					    chain_node);
					    chain_node);
		list_splice_init(&grp_start->async_tx.tx_list,
		list_splice_init(&grp_start->tx_list,
				 &old_chain_tail->chain_node);
				 &old_chain_tail->chain_node);


		if (!mv_can_chain(grp_start))
		if (!mv_can_chain(grp_start))
@@ -632,6 +632,7 @@ static int mv_xor_alloc_chan_resources(struct dma_chan *chan)
		slot->async_tx.tx_submit = mv_xor_tx_submit;
		slot->async_tx.tx_submit = mv_xor_tx_submit;
		INIT_LIST_HEAD(&slot->chain_node);
		INIT_LIST_HEAD(&slot->chain_node);
		INIT_LIST_HEAD(&slot->slot_node);
		INIT_LIST_HEAD(&slot->slot_node);
		INIT_LIST_HEAD(&slot->tx_list);
		hw_desc = (char *) mv_chan->device->dma_desc_pool;
		hw_desc = (char *) mv_chan->device->dma_desc_pool;
		slot->async_tx.phys =
		slot->async_tx.phys =
			(dma_addr_t) &hw_desc[idx * MV_XOR_SLOT_SIZE];
			(dma_addr_t) &hw_desc[idx * MV_XOR_SLOT_SIZE];
+2 −2
Original line number Original line Diff line number Diff line
@@ -126,9 +126,8 @@ struct mv_xor_chan {
 * @idx: pool index
 * @idx: pool index
 * @unmap_src_cnt: number of xor sources
 * @unmap_src_cnt: number of xor sources
 * @unmap_len: transaction bytecount
 * @unmap_len: transaction bytecount
 * @tx_list: list of slots that make up a multi-descriptor transaction
 * @async_tx: support for the async_tx api
 * @async_tx: support for the async_tx api
 * @group_list: list of slots that make up a multi-descriptor transaction
 *	for example transfer lengths larger than the supported hw max
 * @xor_check_result: result of zero sum
 * @xor_check_result: result of zero sum
 * @crc32_result: result crc calculation
 * @crc32_result: result crc calculation
 */
 */
@@ -145,6 +144,7 @@ struct mv_xor_desc_slot {
	u16			unmap_src_cnt;
	u16			unmap_src_cnt;
	u32			value;
	u32			value;
	size_t			unmap_len;
	size_t			unmap_len;
	struct list_head	tx_list;
	struct dma_async_tx_descriptor	async_tx;
	struct dma_async_tx_descriptor	async_tx;
	union {
	union {
		u32		*xor_check_result;
		u32		*xor_check_result;