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Commit 630250f6 authored by Aparna Das's avatar Aparna Das
Browse files

msm: clock-samarium: add clock entry for coresight cti driver 



Add clock support for CoreSight CTI components required by the
CoreSight CTI driver to enable cross-triggering functionality.

Change-Id: Id0ec199ec2dd2ece41a5b9767b617f31920939ee
Signed-off-by: default avatarAparna Das <adas@codeaurora.org>
parent b9b18018

arch/arm/mach-msm/board-samarium.c

+34 −0
Original line number Diff line number Diff line
@@ -84,6 +84,23 @@ static struct clk_lookup msm_clocks_dummy[] = { 
	CLK_DUMMY("core_clk", qdss_clk.c, "fc322000.funnel", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc355000.funnel", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc302000.stm", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc310000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc311000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc312000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc313000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc314000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc315000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc316000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc317000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc318000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc351000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc352000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc353000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc354000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc350000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc330000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc33c000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc360000.cti", OFF),



	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc326000.tmc", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc324000.replicator", OFF),
@@ -93,6 +110,23 @@ static struct clk_lookup msm_clocks_dummy[] = { 
	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc322000.funnel", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc355000.funnel", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc302000.stm", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc310000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc311000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc312000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc313000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc314000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc315000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc316000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc317000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc318000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc351000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc352000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc353000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc354000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc350000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc330000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc33c000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc360000.cti", OFF),

};



static struct clock_init_data msm_dummy_clock_init_data __initdata = {