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Commit 6136fdda authored by anisha agarwal's avatar anisha agarwal Committed by Ken Zhang
Browse files

msm: display: qpic: Add pinctrl support in qpic 



Add pinctrl support for the installation of the required GPIOs
from devicetree, and make appropriate changes in the driver to
initialize and set the pins to active and sleep states during
panel on and off stages respectively in QPIC driver.

Change-Id: I7e227843553c2a32cdd8eed3c622af7e3d556e6c
Signed-off-by: default avatarZohaib Alam <zalam@codeaurora.org>
Signed-off-by: default avataranisha agarwal <anishaa@codeaurora.org>
parent 3a82db8d

drivers/video/msm/mdss/mdss_qpic.h

+1 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 
#include <mach/scm-io.h>

#include <linux/msm-sps.h>



#include <linux/pinctrl/consumer.h>

#include "mdss_panel.h"

#include "mdss_qpic_panel.h"

drivers/video/msm/mdss/mdss_qpic_panel.c

+37 −6
Original line number Diff line number Diff line
@@ -36,6 +36,9 @@ static u32 panel_refresh_rate; 
static int (*qpic_panel_on)(struct qpic_panel_io_desc *qpic_panel_io);

static void (*qpic_panel_off)(struct qpic_panel_io_desc *qpic_panel_io);



static int mdss_qpic_pinctrl_init(struct platform_device *pdev,

		struct qpic_panel_io_desc *qpic_panel_io);



u32 qpic_panel_get_framerate(void)

{

	return panel_refresh_rate;
@@ -99,6 +102,30 @@ u32 qpic_send_frame(u32 x_start, 
	return 0;

}



static int mdss_qpic_pinctrl_init(struct platform_device *pdev,

		struct qpic_panel_io_desc *qpic_panel_io)

{

	qpic_panel_io->pin_res.pinctrl = devm_pinctrl_get(&pdev->dev);

	if (IS_ERR_OR_NULL(qpic_panel_io->pin_res.pinctrl)) {

		pr_err("%s: failed to get pinctrl\n", __func__);

		return PTR_ERR(qpic_panel_io->pin_res.pinctrl);

	}



	qpic_panel_io->pin_res.gpio_state_active

		= pinctrl_lookup_state(qpic_panel_io->pin_res.pinctrl,

				MDSS_PINCTRL_STATE_DEFAULT);

	if (IS_ERR_OR_NULL(qpic_panel_io->pin_res.gpio_state_active))

		pr_warn("%s: cannot get default pinstate\n", __func__);



	qpic_panel_io->pin_res.gpio_state_suspend

		= pinctrl_lookup_state(qpic_panel_io->pin_res.pinctrl,

				MDSS_PINCTRL_STATE_SLEEP);

	if (IS_ERR_OR_NULL(qpic_panel_io->pin_res.gpio_state_suspend))

		pr_warn("%s: cannot get sleep pinstate\n", __func__);



	return 0;

}



int mdss_qpic_panel_on(struct mdss_panel_data *pdata,

	struct qpic_panel_io_desc *panel_io)

{
@@ -125,15 +152,19 @@ int mdss_qpic_panel_off(struct mdss_panel_data *pdata, 
	return 0;

}





int mdss_qpic_panel_io_init(struct platform_device *pdev,

	struct qpic_panel_io_desc *qpic_panel_io)

{

	int rc = 0;

	struct device_node *np = pdev->dev.of_node;

	int rst_gpio, cs_gpio, te_gpio, ad8_gpio, bl_gpio;

	struct regulator *vdd_vreg;

	struct regulator *avdd_vreg;



	rc = mdss_qpic_pinctrl_init(pdev, qpic_panel_io);

	if (rc)

		pr_warn("%s: failed to get pin resources\n", __func__);



	rst_gpio = of_get_named_gpio(np, "qcom,rst-gpio", 0);

	cs_gpio = of_get_named_gpio(np, "qcom,cs-gpio", 0);

	ad8_gpio = of_get_named_gpio(np, "qcom,ad8-gpio", 0);
@@ -141,27 +172,27 @@ int mdss_qpic_panel_io_init(struct platform_device *pdev, 
	bl_gpio = of_get_named_gpio(np, "qcom,bl-gpio", 0);



	if (!gpio_is_valid(rst_gpio))

		pr_err("%s: reset gpio not specified\n" , __func__);

		pr_warn("%s: reset gpio not specified\n" , __func__);

	else

		qpic_panel_io->rst_gpio = rst_gpio;



	if (!gpio_is_valid(cs_gpio))

		pr_err("%s: cs gpio not specified\n", __func__);

		pr_warn("%s: cs gpio not specified\n", __func__);

	else

		qpic_panel_io->cs_gpio = cs_gpio;



	if (!gpio_is_valid(ad8_gpio))

		pr_err("%s: ad8 gpio not specified\n", __func__);

		pr_warn("%s: ad8 gpio not specified\n", __func__);

	else

		qpic_panel_io->ad8_gpio = ad8_gpio;



	if (!gpio_is_valid(te_gpio))

		pr_err("%s: te gpio not specified\n", __func__);

		pr_warn("%s: te gpio not specified\n", __func__);

	else

		qpic_panel_io->te_gpio = te_gpio;



	if (!gpio_is_valid(bl_gpio))

		pr_err("%s: te gpio not specified\n", __func__);

		pr_warn("%s: te gpio not specified\n", __func__);

	else

		qpic_panel_io->bl_gpio = bl_gpio;

drivers/video/msm/mdss/mdss_qpic_panel.h

+7 −0
Original line number Diff line number Diff line
@@ -109,6 +109,12 @@ 
#define OP_ILI9341_INTERFACE_CONTROL	0xf6

#define OP_ILI9341_TEARING_EFFECT_LINE_ON	0x35



struct qpic_pinctrl_res {

	struct pinctrl *pinctrl;

	struct pinctrl_state *gpio_state_active;

	struct pinctrl_state *gpio_state_suspend;

};



struct qpic_panel_io_desc {

	int rst_gpio;

	int cs_gpio;
@@ -118,6 +124,7 @@ struct qpic_panel_io_desc { 
	struct regulator *vdd_vreg;

	struct regulator *avdd_vreg;

	u32 init;

	struct qpic_pinctrl_res pin_res;

};



int mdss_qpic_panel_io_init(struct platform_device *pdev,

drivers/video/msm/mdss/qpic_panel_ili_qvga.c

+62 −24
Original line number Diff line number Diff line
@@ -26,9 +26,12 @@ 


#include <mach/hardware.h>



#include "mdss.h"

#include "mdss_qpic.h"

#include "mdss_qpic_panel.h"



static int mdss_qpic_pinctrl_set_state(struct qpic_panel_io_desc *qpic_panel_io,

		bool active);

static int panel_io_init(struct qpic_panel_io_desc *panel_io)

{

	int rc;
@@ -53,6 +56,9 @@ static int panel_io_init(struct qpic_panel_io_desc *panel_io) 


static void panel_io_off(struct qpic_panel_io_desc *qpic_panel_io)

{

	if (mdss_qpic_pinctrl_set_state(qpic_panel_io, false))

		pr_warn("%s panel on: pinctrl not enabled\n", __func__);



	if (qpic_panel_io->ad8_gpio)

		gpio_free(qpic_panel_io->ad8_gpio);

	if (qpic_panel_io->cs_gpio)
@@ -93,6 +99,10 @@ static int panel_io_on(struct qpic_panel_io_desc *qpic_panel_io) 
		}

	}



	/* GPIO settings using pinctrl */

	if (mdss_qpic_pinctrl_set_state(qpic_panel_io, true)) {

		pr_warn("%s panel on: pinctrl not enabled\n", __func__);



		if ((qpic_panel_io->rst_gpio) &&

			(gpio_request(qpic_panel_io->rst_gpio, "disp_rst_n"))) {

			pr_err("%s request reset gpio failed\n", __func__);
@@ -122,6 +132,8 @@ static int panel_io_on(struct qpic_panel_io_desc *qpic_panel_io) 
			pr_err("%s request bl gpio failed\n", __func__);

			goto power_on_error;

		}

	}



	/* wait for 20 ms after enable gpio as suggested by hw */

	msleep(20);

	return 0;
@@ -191,3 +203,29 @@ int ili9341_on(struct qpic_panel_io_desc *qpic_panel_io) 


	return 0;

}



static int mdss_qpic_pinctrl_set_state(struct qpic_panel_io_desc *qpic_panel_io,

		bool active)

{

	struct pinctrl_state *pin_state;

	int rc = -EFAULT;



	if (IS_ERR_OR_NULL(qpic_panel_io->pin_res.pinctrl))

		return PTR_ERR(qpic_panel_io->pin_res.pinctrl);



	pin_state = active ? qpic_panel_io->pin_res.gpio_state_active

		: qpic_panel_io->pin_res.gpio_state_suspend;

	if (!IS_ERR_OR_NULL(pin_state)) {

		rc = pinctrl_select_state(qpic_panel_io->pin_res.pinctrl,

				pin_state);

		if (rc)

			pr_err("%s: can not set %s pins\n", __func__,

					active ? MDSS_PINCTRL_STATE_DEFAULT

					: MDSS_PINCTRL_STATE_SLEEP);

	} else {

		pr_err("%s: invalid '%s' pinstate\n", __func__,

				active ? MDSS_PINCTRL_STATE_DEFAULT

				: MDSS_PINCTRL_STATE_SLEEP);

	}

	return rc;

}