Loading arch/arm/boot/dts/qcom/apq8084.dtsi +1 −2 Original line number Diff line number Diff line Loading @@ -2552,8 +2552,7 @@ qcom,bytes-per-beat = <16>; }; qcom,msm-cpufreq@0 { reg = <0 4>; qcom,msm-cpufreq { compatible = "qcom,msm-cpufreq"; clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk"; Loading arch/arm/boot/dts/qcom/fsm9900.dtsi +11 −3 Original line number Diff line number Diff line Loading @@ -11,6 +11,7 @@ */ #include "skeleton64.dtsi" #include <dt-bindings/clock/msm-clocks-krait.h> / { model = "Qualcomm Technologies, Inc. FSM9900"; Loading Loading @@ -657,9 +658,15 @@ < 6103 /* 800 MHz */ >; }; qcom,msm-cpufreq@0 { reg = <0 4>; qcom,msm-cpufreq { compatible = "qcom,msm-cpufreq"; clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk"; clocks = <&clock_krait clk_l2_clk>, <&clock_krait clk_krait0_clk>, <&clock_krait clk_krait1_clk>, <&clock_krait clk_krait2_clk>, <&clock_krait clk_krait3_clk>; qcom,cpufreq-table = < 300000 300000 572 >, < 422400 422400 1144 >, Loading @@ -677,7 +684,7 @@ < 2265600 1651200 6103 >; }; qcom,clock-krait@f9016000 { clock_krait: qcom,clock-krait@f9016000 { compatible = "qcom,clock-krait-8974"; reg = <0xf9016000 0x20>, <0xf908a000 0x20>, Loading @@ -699,6 +706,7 @@ qcom,hfpll-config-val = <0x04D0405D>; qcom,hfpll-user-vco-mask = <0x00100000>; qcom,pvs-config-ver = <0>; #clock-cells = <1>; qcom,l2-fmax = Loading arch/arm/boot/dts/qcom/mpq8092-pm.dtsi +7 −0 Original line number Diff line number Diff line Loading @@ -287,6 +287,13 @@ reg = <0xfe805664 0x40>; qcom,pc-mode = "tz_l2_int"; qcom,use-sync-timer; clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk"; clocks = <&clock_krait clk_l2_clk>, <&clock_krait clk_krait0_clk>, <&clock_krait clk_krait1_clk>, <&clock_krait clk_krait2_clk>, <&clock_krait clk_krait3_clk>; qcom,pm-snoc-client { compatible = "qcom,pm-snoc-client"; Loading arch/arm/boot/dts/qcom/mpq8092.dtsi +11 −3 Original line number Diff line number Diff line Loading @@ -11,6 +11,7 @@ */ #include "skeleton.dtsi" #include <dt-bindings/clock/msm-clocks-krait.h> / { model = "Qualcomm Technologies, Inc. MPQ8092"; Loading Loading @@ -281,7 +282,7 @@ }; }; qcom,clock-krait@f9016000 { clock_krait: qcom,clock-krait@f9016000 { compatible = "qcom,clock-krait-8974"; reg = <0xf9016000 0x20>, <0xf908a000 0x20>, Loading @@ -303,6 +304,7 @@ qcom,hfpll-config-val = <0x04D0405D>; qcom,hfpll-user-vco-mask = <0x00100000>; qcom,pvs-config-ver = <1>; #clock-cells = <1>; qcom,l2-fmax = < 0 0 >, Loading Loading @@ -701,9 +703,15 @@ < 8117 /* 532 MHz */ >; }; qcom,msm-cpufreq@0 { reg = <0 4>; qcom,msm-cpufreq { compatible = "qcom,msm-cpufreq"; clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk"; clocks = <&clock_krait clk_l2_clk>, <&clock_krait clk_krait0_clk>, <&clock_krait clk_krait1_clk>, <&clock_krait clk_krait2_clk>, <&clock_krait clk_krait3_clk>; qcom,cpufreq-table = < 300000 300000 8117 >, < 345600 345600 8117 >, Loading arch/arm/boot/dts/qcom/msm8974-v1-pm.dtsi +7 −0 Original line number Diff line number Diff line Loading @@ -306,6 +306,13 @@ ranges; reg = <0xfe805664 0x40>; qcom,use-sync-timer; clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk"; clocks = <&clock_krait clk_l2_clk>, <&clock_krait clk_krait0_clk>, <&clock_krait clk_krait1_clk>, <&clock_krait clk_krait2_clk>, <&clock_krait clk_krait3_clk>; }; qcom,cpu-sleep-status@f9088008 { Loading Loading
arch/arm/boot/dts/qcom/apq8084.dtsi +1 −2 Original line number Diff line number Diff line Loading @@ -2552,8 +2552,7 @@ qcom,bytes-per-beat = <16>; }; qcom,msm-cpufreq@0 { reg = <0 4>; qcom,msm-cpufreq { compatible = "qcom,msm-cpufreq"; clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk"; Loading
arch/arm/boot/dts/qcom/fsm9900.dtsi +11 −3 Original line number Diff line number Diff line Loading @@ -11,6 +11,7 @@ */ #include "skeleton64.dtsi" #include <dt-bindings/clock/msm-clocks-krait.h> / { model = "Qualcomm Technologies, Inc. FSM9900"; Loading Loading @@ -657,9 +658,15 @@ < 6103 /* 800 MHz */ >; }; qcom,msm-cpufreq@0 { reg = <0 4>; qcom,msm-cpufreq { compatible = "qcom,msm-cpufreq"; clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk"; clocks = <&clock_krait clk_l2_clk>, <&clock_krait clk_krait0_clk>, <&clock_krait clk_krait1_clk>, <&clock_krait clk_krait2_clk>, <&clock_krait clk_krait3_clk>; qcom,cpufreq-table = < 300000 300000 572 >, < 422400 422400 1144 >, Loading @@ -677,7 +684,7 @@ < 2265600 1651200 6103 >; }; qcom,clock-krait@f9016000 { clock_krait: qcom,clock-krait@f9016000 { compatible = "qcom,clock-krait-8974"; reg = <0xf9016000 0x20>, <0xf908a000 0x20>, Loading @@ -699,6 +706,7 @@ qcom,hfpll-config-val = <0x04D0405D>; qcom,hfpll-user-vco-mask = <0x00100000>; qcom,pvs-config-ver = <0>; #clock-cells = <1>; qcom,l2-fmax = Loading
arch/arm/boot/dts/qcom/mpq8092-pm.dtsi +7 −0 Original line number Diff line number Diff line Loading @@ -287,6 +287,13 @@ reg = <0xfe805664 0x40>; qcom,pc-mode = "tz_l2_int"; qcom,use-sync-timer; clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk"; clocks = <&clock_krait clk_l2_clk>, <&clock_krait clk_krait0_clk>, <&clock_krait clk_krait1_clk>, <&clock_krait clk_krait2_clk>, <&clock_krait clk_krait3_clk>; qcom,pm-snoc-client { compatible = "qcom,pm-snoc-client"; Loading
arch/arm/boot/dts/qcom/mpq8092.dtsi +11 −3 Original line number Diff line number Diff line Loading @@ -11,6 +11,7 @@ */ #include "skeleton.dtsi" #include <dt-bindings/clock/msm-clocks-krait.h> / { model = "Qualcomm Technologies, Inc. MPQ8092"; Loading Loading @@ -281,7 +282,7 @@ }; }; qcom,clock-krait@f9016000 { clock_krait: qcom,clock-krait@f9016000 { compatible = "qcom,clock-krait-8974"; reg = <0xf9016000 0x20>, <0xf908a000 0x20>, Loading @@ -303,6 +304,7 @@ qcom,hfpll-config-val = <0x04D0405D>; qcom,hfpll-user-vco-mask = <0x00100000>; qcom,pvs-config-ver = <1>; #clock-cells = <1>; qcom,l2-fmax = < 0 0 >, Loading Loading @@ -701,9 +703,15 @@ < 8117 /* 532 MHz */ >; }; qcom,msm-cpufreq@0 { reg = <0 4>; qcom,msm-cpufreq { compatible = "qcom,msm-cpufreq"; clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk"; clocks = <&clock_krait clk_l2_clk>, <&clock_krait clk_krait0_clk>, <&clock_krait clk_krait1_clk>, <&clock_krait clk_krait2_clk>, <&clock_krait clk_krait3_clk>; qcom,cpufreq-table = < 300000 300000 8117 >, < 345600 345600 8117 >, Loading
arch/arm/boot/dts/qcom/msm8974-v1-pm.dtsi +7 −0 Original line number Diff line number Diff line Loading @@ -306,6 +306,13 @@ ranges; reg = <0xfe805664 0x40>; qcom,use-sync-timer; clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk"; clocks = <&clock_krait clk_l2_clk>, <&clock_krait clk_krait0_clk>, <&clock_krait clk_krait1_clk>, <&clock_krait clk_krait2_clk>, <&clock_krait clk_krait3_clk>; }; qcom,cpu-sleep-status@f9088008 { Loading