Loading arch/arm/boot/dts/qcom/msm8916-camera-sensor-cdp.dtsi 0 → 100644 +159 −0 Original line number Diff line number Diff line /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ &soc { led_flash0: qcom,camera-led-flash { cell-index = <0>; compatible = "qcom,camera-led-flash"; qcom,flash-type = <1>; }; }; &cci { actuator0: qcom,actuator@6e { cell-index = <3>; reg = <0x6c>; compatible = "qcom,actuator"; qcom,cci-master = <0>; }; actuator1: qcom,actuator@36 { cell-index = <1>; reg = <0x36>; compatible = "qcom,actuator"; qcom,cci-master = <0>; }; qcom,camera@78 { compatible = "qcom,ov5645"; reg = <0x78 0x0>; qcom,slave-id = <0x78 0x300a 0x5645>; qcom,csiphy-sd-index = <1>; qcom,csid-sd-index = <1>; qcom,mount-angle = <90>; qcom,sensor-name = "ov5645"; cam_vdig-supply = <&pm8916_s4>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; qcom,cam-vreg-type = <0 1 0>; qcom,cam-vreg-min-voltage = <2100000 0 2850000>; qcom,cam-vreg-max-voltage = <2100000 0 2850000>; qcom,cam-vreg-op-mode = <200000 0 80000>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_default &cam_sensor_front_default>; pinctrl-1 = <&cam_sensor_mclk1_sleep &cam_sensor_front_sleep>; gpios = <&msm_gpio 27 0>, <&msm_gpio 28 0>, <&msm_gpio 33 0>; qcom,gpio-reset = <1>; qcom,gpio-standby = <2>; qcom,gpio-req-tbl-num = <0 1 2>; qcom,gpio-req-tbl-flags = <1 0 0>; qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET", "CAM_STANDBY"; qcom,gpio-set-tbl-num = <1 1>; qcom,gpio-set-tbl-flags = <0 2>; qcom,gpio-set-tbl-delay = <1000 4000>; qcom,csi-lane-assign = <0x4320>; qcom,csi-lane-mask = <0x3>; qcom,sensor-position = <1>; qcom,sensor-mode = <0>; qcom,cci-master = <0>; clocks = <&clock_gcc clk_mclk1_clk_src>, <&clock_gcc clk_gcc_camss_mclk1_clk>; clock-names = "cam_src_clk", "cam_clk"; }; qcom,camera@0 { cell-index = <0>; compatible = "qcom,camera"; reg = <0x0>; qcom,csiphy-sd-index = <0>; qcom,csid-sd-index = <0>; qcom,mount-angle = <90>; qcom,actuator-src = <&actuator0>; qcom,led-flash-src = <&led_flash0>; cam_vdig-supply = <&pm8916_s4>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; cam_vaf-supply = <&pm8916_l10>; qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana", "cam_vaf"; qcom,cam-vreg-type = <0 1 0 0>; qcom,cam-vreg-min-voltage = <2100000 0 2850000 2800000>; qcom,cam-vreg-max-voltage = <2100000 0 2850000 2800000>; qcom,cam-vreg-op-mode = <200000 0 80000 100000>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_default &cam_sensor_rear_default>; pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep>; gpios = <&msm_gpio 26 0>, <&msm_gpio 35 0>, <&msm_gpio 34 0>; qcom,gpio-reset = <1>; qcom,gpio-standby = <2>; qcom,gpio-req-tbl-num = <0 1 2>; qcom,gpio-req-tbl-flags = <1 0 0>; qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET1", "CAM_STANDBY"; qcom,sensor-position = <0>; qcom,sensor-mode = <0>; qcom,cci-master = <0>; status = "ok"; clocks = <&clock_gcc clk_mclk0_clk_src>, <&clock_gcc clk_gcc_camss_mclk0_clk>; clock-names = "cam_src_clk", "cam_clk"; }; qcom,camera@1 { cell-index = <1>; compatible = "qcom,camera"; reg = <0x1>; qcom,csiphy-sd-index = <1>; qcom,csid-sd-index = <1>; qcom,mount-angle = <90>; cam_vdig-supply = <&pm8916_s4>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; qcom,cam-vreg-type = <0 1 0>; qcom,cam-vreg-min-voltage = <2100000 0 2850000>; qcom,cam-vreg-max-voltage = <2100000 0 2850000>; qcom,cam-vreg-op-mode = <200000 0 80000>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_default &cam_sensor_front_default>; pinctrl-1 = <&cam_sensor_mclk1_sleep &cam_sensor_front_sleep>; gpios = <&msm_gpio 27 0>, <&msm_gpio 28 0>, <&msm_gpio 33 0>; qcom,gpio-reset = <1>; qcom,gpio-standby = <2>; qcom,gpio-req-tbl-num = <0 1 2>; qcom,gpio-req-tbl-flags = <1 0 0>; qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET", "CAM_STANDBY"; qcom,cci-master = <0>; status = "ok"; clocks = <&clock_gcc clk_mclk1_clk_src>, <&clock_gcc clk_gcc_camss_mclk1_clk>; clock-names = "cam_src_clk", "cam_clk"; }; }; arch/arm/boot/dts/qcom/msm8916-camera-sensor-mtp.dtsi 0 → 100644 +159 −0 Original line number Diff line number Diff line /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ &soc { led_flash0: qcom,camera-led-flash { cell-index = <0>; compatible = "qcom,camera-led-flash"; qcom,flash-type = <1>; }; }; &cci { actuator0: qcom,actuator@6e { cell-index = <3>; reg = <0x6c>; compatible = "qcom,actuator"; qcom,cci-master = <0>; }; actuator1: qcom,actuator@36 { cell-index = <1>; reg = <0x36>; compatible = "qcom,actuator"; qcom,cci-master = <0>; }; qcom,camera@78 { compatible = "qcom,ov5645"; reg = <0x78 0x0>; qcom,slave-id = <0x78 0x300a 0x5645>; qcom,csiphy-sd-index = <1>; qcom,csid-sd-index = <1>; qcom,mount-angle = <90>; qcom,sensor-name = "ov5645"; cam_vdig-supply = <&pm8916_s4>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; qcom,cam-vreg-type = <0 1 0>; qcom,cam-vreg-min-voltage = <2100000 0 2850000>; qcom,cam-vreg-max-voltage = <2100000 0 2850000>; qcom,cam-vreg-op-mode = <200000 0 80000>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_default &cam_sensor_front_default>; pinctrl-1 = <&cam_sensor_mclk1_sleep &cam_sensor_front_sleep>; gpios = <&msm_gpio 27 0>, <&msm_gpio 28 0>, <&msm_gpio 33 0>; qcom,gpio-reset = <1>; qcom,gpio-standby = <2>; qcom,gpio-req-tbl-num = <0 1 2>; qcom,gpio-req-tbl-flags = <1 0 0>; qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET", "CAM_STANDBY"; qcom,gpio-set-tbl-num = <1 1>; qcom,gpio-set-tbl-flags = <0 2>; qcom,gpio-set-tbl-delay = <1000 4000>; qcom,csi-lane-assign = <0x4320>; qcom,csi-lane-mask = <0x3>; qcom,sensor-position = <1>; qcom,sensor-mode = <0>; qcom,cci-master = <0>; clocks = <&clock_gcc clk_mclk1_clk_src>, <&clock_gcc clk_gcc_camss_mclk1_clk>; clock-names = "cam_src_clk", "cam_clk"; }; qcom,camera@0 { cell-index = <0>; compatible = "qcom,camera"; reg = <0x0>; qcom,csiphy-sd-index = <0>; qcom,csid-sd-index = <0>; qcom,mount-angle = <90>; qcom,actuator-src = <&actuator0>; qcom,led-flash-src = <&led_flash0>; cam_vdig-supply = <&pm8916_s4>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; cam_vaf-supply = <&pm8916_l10>; qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana", "cam_vaf"; qcom,cam-vreg-type = <0 1 0 0>; qcom,cam-vreg-min-voltage = <2100000 0 2850000 2800000>; qcom,cam-vreg-max-voltage = <2100000 0 2850000 2800000>; qcom,cam-vreg-op-mode = <200000 0 80000 100000>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_default &cam_sensor_rear_default>; pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep>; gpios = <&msm_gpio 26 0>, <&msm_gpio 35 0>, <&msm_gpio 34 0>; qcom,gpio-reset = <1>; qcom,gpio-standby = <2>; qcom,gpio-req-tbl-num = <0 1 2>; qcom,gpio-req-tbl-flags = <1 0 0>; qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET1", "CAM_STANDBY"; qcom,sensor-position = <0>; qcom,sensor-mode = <0>; qcom,cci-master = <0>; status = "ok"; clocks = <&clock_gcc clk_mclk0_clk_src>, <&clock_gcc clk_gcc_camss_mclk0_clk>; clock-names = "cam_src_clk", "cam_clk"; }; qcom,camera@1 { cell-index = <1>; compatible = "qcom,camera"; reg = <0x1>; qcom,csiphy-sd-index = <1>; qcom,csid-sd-index = <1>; qcom,mount-angle = <90>; cam_vdig-supply = <&pm8916_s4>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; qcom,cam-vreg-type = <0 1 0>; qcom,cam-vreg-min-voltage = <2100000 0 2850000>; qcom,cam-vreg-max-voltage = <2100000 0 2850000>; qcom,cam-vreg-op-mode = <200000 0 80000>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_default &cam_sensor_front_default>; pinctrl-1 = <&cam_sensor_mclk1_sleep &cam_sensor_front_sleep>; gpios = <&msm_gpio 27 0>, <&msm_gpio 28 0>, <&msm_gpio 33 0>; qcom,gpio-reset = <1>; qcom,gpio-standby = <2>; qcom,gpio-req-tbl-num = <0 1 2>; qcom,gpio-req-tbl-flags = <1 0 0>; qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET", "CAM_STANDBY"; qcom,cci-master = <0>; status = "ok"; clocks = <&clock_gcc clk_mclk1_clk_src>, <&clock_gcc clk_gcc_camss_mclk1_clk>; clock-names = "cam_src_clk", "cam_clk"; }; }; arch/arm/boot/dts/qcom/msm8916-camera.dtsi 0 → 100644 +332 −0 Original line number Diff line number Diff line /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ &soc { qcom,msm-cam@1800000{ compatible = "qcom,msm-cam"; }; qcom,csiphy@1b0ac00 { cell-index = <0>; compatible = "qcom,csiphy-v3.1", "qcom,csiphy"; reg = <0x1b0ac00 0x200>, <0x1b00030 0x4>; reg-names = "csiphy", "csiphy_clk_mux"; interrupts = <0 78 0>; interrupt-names = "csiphy"; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_csi0phytimer_clk_src>, <&clock_gcc clk_gcc_camss_csi0phytimer_clk>, <&clock_gcc clk_camss_ahb_clk_src>; clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk"; qcom,clock-rates = <0 0 200000000 0 0>; }; qcom,csiphy@1b0b000 { cell-index = <1>; compatible = "qcom,csiphy-v3.1", "qcom,csiphy"; reg = <0x1b0b000 0x200>, <0x1b00038 0x4>; reg-names = "csiphy", "csiphy_clk_mux"; interrupts = <0 79 0>; interrupt-names = "csiphy"; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_csi1phytimer_clk_src>, <&clock_gcc clk_gcc_camss_csi1phytimer_clk>, <&clock_gcc clk_camss_ahb_clk_src>; clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk"; qcom,clock-rates = <0 0 200000000 0 0>; }; qcom,csid@1b08000 { cell-index = <0>; compatible = "qcom,csid-v3.1", "qcom,csid"; reg = <0x1b08000 0x100>; reg-names = "csid"; interrupts = <0 51 0>; interrupt-names = "csid"; qcom,csi-vdd-voltage = <1200000>; qcom,mipi-csi-vdd-supply = <&pm8916_l2>; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_gcc_camss_csi0_ahb_clk>, <&clock_gcc clk_csi0_clk_src>, <&clock_gcc clk_gcc_camss_csi0_clk>, <&clock_gcc clk_gcc_camss_csi0phy_clk>, <&clock_gcc clk_gcc_camss_csi0pix_clk>, <&clock_gcc clk_gcc_camss_csi0rdi_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_phy_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_phy_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; qcom,clock-rates = <0 0 0 200000000 0 0 0 0 0>; }; qcom,csid@1b08400 { cell-index = <1>; compatible = "qcom,csid-v3.1", "qcom,csid"; reg = <0x1b08400 0x100>; reg-names = "csid"; interrupts = <0 52 0>; interrupt-names = "csid"; qcom,csi-vdd-voltage = <1200000>; qcom,mipi-csi-vdd-supply = <&pm8916_l2>; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_gcc_camss_csi1_ahb_clk>, <&clock_gcc clk_csi1_clk_src>, <&clock_gcc clk_gcc_camss_csi1_clk>, <&clock_gcc clk_gcc_camss_csi1phy_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_gcc_camss_csi1rdi_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_phy_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_phy_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; qcom,clock-rates = <0 0 0 200000000 0 0 0 0 0>; }; qcom,ispif@1b0a000 { cell-index = <0>; compatible = "qcom,ispif-v3.0", "qcom,ispif"; reg = <0x1b0a000 0x500>, <0x1b00020 0x10>; reg-names = "ispif", "csi_clk_mux"; interrupts = <0 55 0>; interrupt-names = "ispif"; clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>, <&clock_gcc clk_csi0_clk_src>, <&clock_gcc clk_gcc_camss_csi0_clk>, <&clock_gcc clk_gcc_camss_csi0pix_clk>, <&clock_gcc clk_gcc_camss_csi0rdi_clk>, <&clock_gcc clk_csi1_clk_src>, <&clock_gcc clk_gcc_camss_csi1_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_gcc_camss_csi1rdi_clk>, <&clock_gcc clk_csi1_clk_src>, <&clock_gcc clk_gcc_camss_csi1_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_gcc_camss_csi1rdi_clk>, <&clock_gcc clk_csi1_clk_src>, <&clock_gcc clk_gcc_camss_csi1_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_gcc_camss_csi1rdi_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_csi_vfe0_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_csi_vfe0_clk>; clock-names = "ispif_ahb_clk","camss_ahb_clk", "csi0_src_clk", "csi0_clk", "csi0_pix_clk","csi0_rdi_clk", "csi1_src_clk", "csi1_clk", "csi1_pix_clk", "csi1_rdi_clk", "csi2_src_clk","csi2_clk", "csi2_pix_clk","csi2_rdi_clk", "csi3_src_clk","csi3_clk", "csi3_pix_clk", "csi3_rdi_clk", "vfe0_clk_src", "camss_vfe_vfe0_clk", "camss_csi_vfe0_clk","vfe1_clk_src","camss_vfe_vfe1_clk", "camss_csi_vfe1_clk"; qcom,clock-names = "ispif_ahb_clk", "camss_ahb_clk"; qcom,clock-rates = <0 0>; }; qcom,vfe@1b10000 { cell-index = <0>; compatible = "qcom,vfe40"; reg = <0x1b10000 0x1000>, <0x1b40000 0x200>; reg-names = "vfe", "vfe_vbif"; interrupts = <0 57 0>; interrupt-names = "vfe"; vdd-supply = <&gdsc_vfe>; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_csi_vfe0_clk>, <&clock_gcc clk_gcc_camss_vfe_ahb_clk>, <&clock_gcc clk_gcc_camss_vfe_axi_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk", "bus_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk", "bus_clk", "camss_ahb_clk"; qcom,clock-rates = <0 266670000 0 0 0 0 0>; }; qcom,jpeg@1b1c000 { cell-index = <0>; compatible = "qcom,jpeg"; reg = <0x1b1c000 0x400>, <0x1b60000 0xc30>; reg-names = "jpeg"; interrupts = <0 59 0>; interrupt-names = "jpeg"; vdd-supply = <&gdsc_jpeg>; clocks = <&clock_gcc clk_gcc_camss_jpeg0_clk>, <&clock_gcc clk_gcc_camss_jpeg_ahb_clk>, <&clock_gcc clk_gcc_camss_jpeg_axi_clk>, <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "core_clk", "iface_clk", "bus_clk0", "camss_top_ahb_clk", "camss_ahb_clk"; qcom,clock-names = "core_clk", "iface_clk", "bus_clk0", "camss_top_ahb_clk", "camss_ahb_clk"; qcom,clock-rates = <266670000 0 0 0 0>; }; qcom,irqrouter@1b00000 { cell-index = <0>; compatible = "qcom,irqrouter"; reg = <0x1b00000 0x100>; reg-names = "irqrouter"; }; qcom,cpp@1b04000 { cell-index = <0>; compatible = "qcom,cpp"; reg = <0x1b04000 0x100>, <0x1b40000 0x200>, <0x1b18000 0x018>; reg-names = "cpp", "cpp_vbif", "cpp_hw"; interrupts = <0 49 0>; interrupt-names = "cpp"; vdd-supply = <&gdsc_vfe>; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_vfe_ahb_clk>, <&clock_gcc clk_gcc_camss_cpp_clk>, <&clock_gcc clk_gcc_camss_cpp_ahb_clk>, <&clock_gcc clk_gcc_camss_vfe_axi_clk>, <&clock_gcc clk_gcc_camss_micro_ahb_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "iface_clk", "cpp_core_clk", "cpp_iface_clk", "cpp_bus_clk", "micro_iface_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "iface_clk", "cpp_core_clk", "cpp_iface_clk", "cpp_bus_clk", "micro_iface_clk", "camss_ahb_clk"; qcom,clock-rates = <0 320000000 0 80000000 320000000 0 0 0 0>; }; cci: qcom,cci@1b0c000 { cell-index = <0>; compatible = "qcom,cci"; reg = <0x1b0c000 0x1000>; #address-cells = <1>; #size-cells = <0>; reg-names = "cci"; interrupts = <0 50 0>; interrupt-names = "cci"; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_cci_clk_src>, <&clock_gcc clk_gcc_camss_cci_ahb_clk>, <&clock_gcc clk_gcc_camss_cci_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "cci_src_clk", "cci_ahb_clk", "cci_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "cci_src_clk", "cci_ahb_clk", "cci_clk", "camss_ahb_clk"; qcom,clock-rates = <0 19200000 80000000 0 0>; pinctrl-names = "cci_default", "cci_suspend"; pinctrl-0 = <&cci0_default>; pinctrl-1 = <&cci0_sleep>; gpios = <&msm_gpio 29 0>, <&msm_gpio 30 0>; qcom,gpio-tbl-num = <0 1>; qcom,gpio-tbl-flags = <1 1>; qcom,gpio-tbl-label = "CCI_I2C_DATA0", "CCI_I2C_CLK0"; i2c_freq_100Khz: qcom,i2c_standard_mode { status = "disabled"; }; i2c_freq_400Khz: qcom,i2c_fast_mode { status = "disabled"; }; i2c_freq_custom: qcom,i2c_custom_mode { status = "disabled"; }; }; }; &i2c_freq_100Khz { qcom,hw-thigh = <78>; qcom,hw-tlow = <114>; qcom,hw-tsu-sto = <28>; qcom,hw-tsu-sta = <28>; qcom,hw-thd-dat = <10>; qcom,hw-thd-sta = <77>; qcom,hw-tbuf = <118>; qcom,hw-scl-stretch-en = <0>; qcom,hw-trdhld = <6>; qcom,hw-tsp = <1>; status = "ok"; }; &i2c_freq_400Khz { qcom,hw-thigh = <20>; qcom,hw-tlow = <28>; qcom,hw-tsu-sto = <21>; qcom,hw-tsu-sta = <21>; qcom,hw-thd-dat = <13>; qcom,hw-thd-sta = <18>; qcom,hw-tbuf = <25>; qcom,hw-scl-stretch-en = <0>; qcom,hw-trdhld = <6>; qcom,hw-tsp = <3>; status = "ok"; }; &i2c_freq_custom { qcom,hw-thigh = <15>; qcom,hw-tlow = <28>; qcom,hw-tsu-sto = <21>; qcom,hw-tsu-sta = <21>; qcom,hw-thd-dat = <13>; qcom,hw-thd-sta = <18>; qcom,hw-tbuf = <25>; qcom,hw-scl-stretch-en = <1>; qcom,hw-trdhld = <6>; qcom,hw-tsp = <3>; status = "ok"; }; arch/arm/boot/dts/qcom/msm8916-cdp.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ #include "msm8916.dtsi" #include "msm8916-pinctrl.dtsi" #include "msm8916-camera-sensor-cdp.dtsi" / { aliases { Loading arch/arm/boot/dts/qcom/msm8916-mtp.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ #include "msm8916.dtsi" #include "msm8916-pinctrl.dtsi" #include "msm8916-camera-sensor-mtp.dtsi" / { aliases { Loading Loading
arch/arm/boot/dts/qcom/msm8916-camera-sensor-cdp.dtsi 0 → 100644 +159 −0 Original line number Diff line number Diff line /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ &soc { led_flash0: qcom,camera-led-flash { cell-index = <0>; compatible = "qcom,camera-led-flash"; qcom,flash-type = <1>; }; }; &cci { actuator0: qcom,actuator@6e { cell-index = <3>; reg = <0x6c>; compatible = "qcom,actuator"; qcom,cci-master = <0>; }; actuator1: qcom,actuator@36 { cell-index = <1>; reg = <0x36>; compatible = "qcom,actuator"; qcom,cci-master = <0>; }; qcom,camera@78 { compatible = "qcom,ov5645"; reg = <0x78 0x0>; qcom,slave-id = <0x78 0x300a 0x5645>; qcom,csiphy-sd-index = <1>; qcom,csid-sd-index = <1>; qcom,mount-angle = <90>; qcom,sensor-name = "ov5645"; cam_vdig-supply = <&pm8916_s4>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; qcom,cam-vreg-type = <0 1 0>; qcom,cam-vreg-min-voltage = <2100000 0 2850000>; qcom,cam-vreg-max-voltage = <2100000 0 2850000>; qcom,cam-vreg-op-mode = <200000 0 80000>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_default &cam_sensor_front_default>; pinctrl-1 = <&cam_sensor_mclk1_sleep &cam_sensor_front_sleep>; gpios = <&msm_gpio 27 0>, <&msm_gpio 28 0>, <&msm_gpio 33 0>; qcom,gpio-reset = <1>; qcom,gpio-standby = <2>; qcom,gpio-req-tbl-num = <0 1 2>; qcom,gpio-req-tbl-flags = <1 0 0>; qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET", "CAM_STANDBY"; qcom,gpio-set-tbl-num = <1 1>; qcom,gpio-set-tbl-flags = <0 2>; qcom,gpio-set-tbl-delay = <1000 4000>; qcom,csi-lane-assign = <0x4320>; qcom,csi-lane-mask = <0x3>; qcom,sensor-position = <1>; qcom,sensor-mode = <0>; qcom,cci-master = <0>; clocks = <&clock_gcc clk_mclk1_clk_src>, <&clock_gcc clk_gcc_camss_mclk1_clk>; clock-names = "cam_src_clk", "cam_clk"; }; qcom,camera@0 { cell-index = <0>; compatible = "qcom,camera"; reg = <0x0>; qcom,csiphy-sd-index = <0>; qcom,csid-sd-index = <0>; qcom,mount-angle = <90>; qcom,actuator-src = <&actuator0>; qcom,led-flash-src = <&led_flash0>; cam_vdig-supply = <&pm8916_s4>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; cam_vaf-supply = <&pm8916_l10>; qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana", "cam_vaf"; qcom,cam-vreg-type = <0 1 0 0>; qcom,cam-vreg-min-voltage = <2100000 0 2850000 2800000>; qcom,cam-vreg-max-voltage = <2100000 0 2850000 2800000>; qcom,cam-vreg-op-mode = <200000 0 80000 100000>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_default &cam_sensor_rear_default>; pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep>; gpios = <&msm_gpio 26 0>, <&msm_gpio 35 0>, <&msm_gpio 34 0>; qcom,gpio-reset = <1>; qcom,gpio-standby = <2>; qcom,gpio-req-tbl-num = <0 1 2>; qcom,gpio-req-tbl-flags = <1 0 0>; qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET1", "CAM_STANDBY"; qcom,sensor-position = <0>; qcom,sensor-mode = <0>; qcom,cci-master = <0>; status = "ok"; clocks = <&clock_gcc clk_mclk0_clk_src>, <&clock_gcc clk_gcc_camss_mclk0_clk>; clock-names = "cam_src_clk", "cam_clk"; }; qcom,camera@1 { cell-index = <1>; compatible = "qcom,camera"; reg = <0x1>; qcom,csiphy-sd-index = <1>; qcom,csid-sd-index = <1>; qcom,mount-angle = <90>; cam_vdig-supply = <&pm8916_s4>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; qcom,cam-vreg-type = <0 1 0>; qcom,cam-vreg-min-voltage = <2100000 0 2850000>; qcom,cam-vreg-max-voltage = <2100000 0 2850000>; qcom,cam-vreg-op-mode = <200000 0 80000>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_default &cam_sensor_front_default>; pinctrl-1 = <&cam_sensor_mclk1_sleep &cam_sensor_front_sleep>; gpios = <&msm_gpio 27 0>, <&msm_gpio 28 0>, <&msm_gpio 33 0>; qcom,gpio-reset = <1>; qcom,gpio-standby = <2>; qcom,gpio-req-tbl-num = <0 1 2>; qcom,gpio-req-tbl-flags = <1 0 0>; qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET", "CAM_STANDBY"; qcom,cci-master = <0>; status = "ok"; clocks = <&clock_gcc clk_mclk1_clk_src>, <&clock_gcc clk_gcc_camss_mclk1_clk>; clock-names = "cam_src_clk", "cam_clk"; }; };
arch/arm/boot/dts/qcom/msm8916-camera-sensor-mtp.dtsi 0 → 100644 +159 −0 Original line number Diff line number Diff line /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ &soc { led_flash0: qcom,camera-led-flash { cell-index = <0>; compatible = "qcom,camera-led-flash"; qcom,flash-type = <1>; }; }; &cci { actuator0: qcom,actuator@6e { cell-index = <3>; reg = <0x6c>; compatible = "qcom,actuator"; qcom,cci-master = <0>; }; actuator1: qcom,actuator@36 { cell-index = <1>; reg = <0x36>; compatible = "qcom,actuator"; qcom,cci-master = <0>; }; qcom,camera@78 { compatible = "qcom,ov5645"; reg = <0x78 0x0>; qcom,slave-id = <0x78 0x300a 0x5645>; qcom,csiphy-sd-index = <1>; qcom,csid-sd-index = <1>; qcom,mount-angle = <90>; qcom,sensor-name = "ov5645"; cam_vdig-supply = <&pm8916_s4>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; qcom,cam-vreg-type = <0 1 0>; qcom,cam-vreg-min-voltage = <2100000 0 2850000>; qcom,cam-vreg-max-voltage = <2100000 0 2850000>; qcom,cam-vreg-op-mode = <200000 0 80000>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_default &cam_sensor_front_default>; pinctrl-1 = <&cam_sensor_mclk1_sleep &cam_sensor_front_sleep>; gpios = <&msm_gpio 27 0>, <&msm_gpio 28 0>, <&msm_gpio 33 0>; qcom,gpio-reset = <1>; qcom,gpio-standby = <2>; qcom,gpio-req-tbl-num = <0 1 2>; qcom,gpio-req-tbl-flags = <1 0 0>; qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET", "CAM_STANDBY"; qcom,gpio-set-tbl-num = <1 1>; qcom,gpio-set-tbl-flags = <0 2>; qcom,gpio-set-tbl-delay = <1000 4000>; qcom,csi-lane-assign = <0x4320>; qcom,csi-lane-mask = <0x3>; qcom,sensor-position = <1>; qcom,sensor-mode = <0>; qcom,cci-master = <0>; clocks = <&clock_gcc clk_mclk1_clk_src>, <&clock_gcc clk_gcc_camss_mclk1_clk>; clock-names = "cam_src_clk", "cam_clk"; }; qcom,camera@0 { cell-index = <0>; compatible = "qcom,camera"; reg = <0x0>; qcom,csiphy-sd-index = <0>; qcom,csid-sd-index = <0>; qcom,mount-angle = <90>; qcom,actuator-src = <&actuator0>; qcom,led-flash-src = <&led_flash0>; cam_vdig-supply = <&pm8916_s4>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; cam_vaf-supply = <&pm8916_l10>; qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana", "cam_vaf"; qcom,cam-vreg-type = <0 1 0 0>; qcom,cam-vreg-min-voltage = <2100000 0 2850000 2800000>; qcom,cam-vreg-max-voltage = <2100000 0 2850000 2800000>; qcom,cam-vreg-op-mode = <200000 0 80000 100000>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk0_default &cam_sensor_rear_default>; pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep>; gpios = <&msm_gpio 26 0>, <&msm_gpio 35 0>, <&msm_gpio 34 0>; qcom,gpio-reset = <1>; qcom,gpio-standby = <2>; qcom,gpio-req-tbl-num = <0 1 2>; qcom,gpio-req-tbl-flags = <1 0 0>; qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET1", "CAM_STANDBY"; qcom,sensor-position = <0>; qcom,sensor-mode = <0>; qcom,cci-master = <0>; status = "ok"; clocks = <&clock_gcc clk_mclk0_clk_src>, <&clock_gcc clk_gcc_camss_mclk0_clk>; clock-names = "cam_src_clk", "cam_clk"; }; qcom,camera@1 { cell-index = <1>; compatible = "qcom,camera"; reg = <0x1>; qcom,csiphy-sd-index = <1>; qcom,csid-sd-index = <1>; qcom,mount-angle = <90>; cam_vdig-supply = <&pm8916_s4>; cam_vana-supply = <&pm8916_l17>; cam_vio-supply = <&pm8916_l6>; qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; qcom,cam-vreg-type = <0 1 0>; qcom,cam-vreg-min-voltage = <2100000 0 2850000>; qcom,cam-vreg-max-voltage = <2100000 0 2850000>; qcom,cam-vreg-op-mode = <200000 0 80000>; pinctrl-names = "cam_default", "cam_suspend"; pinctrl-0 = <&cam_sensor_mclk1_default &cam_sensor_front_default>; pinctrl-1 = <&cam_sensor_mclk1_sleep &cam_sensor_front_sleep>; gpios = <&msm_gpio 27 0>, <&msm_gpio 28 0>, <&msm_gpio 33 0>; qcom,gpio-reset = <1>; qcom,gpio-standby = <2>; qcom,gpio-req-tbl-num = <0 1 2>; qcom,gpio-req-tbl-flags = <1 0 0>; qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET", "CAM_STANDBY"; qcom,cci-master = <0>; status = "ok"; clocks = <&clock_gcc clk_mclk1_clk_src>, <&clock_gcc clk_gcc_camss_mclk1_clk>; clock-names = "cam_src_clk", "cam_clk"; }; };
arch/arm/boot/dts/qcom/msm8916-camera.dtsi 0 → 100644 +332 −0 Original line number Diff line number Diff line /* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ &soc { qcom,msm-cam@1800000{ compatible = "qcom,msm-cam"; }; qcom,csiphy@1b0ac00 { cell-index = <0>; compatible = "qcom,csiphy-v3.1", "qcom,csiphy"; reg = <0x1b0ac00 0x200>, <0x1b00030 0x4>; reg-names = "csiphy", "csiphy_clk_mux"; interrupts = <0 78 0>; interrupt-names = "csiphy"; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_csi0phytimer_clk_src>, <&clock_gcc clk_gcc_camss_csi0phytimer_clk>, <&clock_gcc clk_camss_ahb_clk_src>; clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk"; qcom,clock-rates = <0 0 200000000 0 0>; }; qcom,csiphy@1b0b000 { cell-index = <1>; compatible = "qcom,csiphy-v3.1", "qcom,csiphy"; reg = <0x1b0b000 0x200>, <0x1b00038 0x4>; reg-names = "csiphy", "csiphy_clk_mux"; interrupts = <0 79 0>; interrupt-names = "csiphy"; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_csi1phytimer_clk_src>, <&clock_gcc clk_gcc_camss_csi1phytimer_clk>, <&clock_gcc clk_camss_ahb_clk_src>; clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_clk"; qcom,clock-rates = <0 0 200000000 0 0>; }; qcom,csid@1b08000 { cell-index = <0>; compatible = "qcom,csid-v3.1", "qcom,csid"; reg = <0x1b08000 0x100>; reg-names = "csid"; interrupts = <0 51 0>; interrupt-names = "csid"; qcom,csi-vdd-voltage = <1200000>; qcom,mipi-csi-vdd-supply = <&pm8916_l2>; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_gcc_camss_csi0_ahb_clk>, <&clock_gcc clk_csi0_clk_src>, <&clock_gcc clk_gcc_camss_csi0_clk>, <&clock_gcc clk_gcc_camss_csi0phy_clk>, <&clock_gcc clk_gcc_camss_csi0pix_clk>, <&clock_gcc clk_gcc_camss_csi0rdi_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_phy_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_phy_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; qcom,clock-rates = <0 0 0 200000000 0 0 0 0 0>; }; qcom,csid@1b08400 { cell-index = <1>; compatible = "qcom,csid-v3.1", "qcom,csid"; reg = <0x1b08400 0x100>; reg-names = "csid"; interrupts = <0 52 0>; interrupt-names = "csid"; qcom,csi-vdd-voltage = <1200000>; qcom,mipi-csi-vdd-supply = <&pm8916_l2>; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_gcc_camss_csi1_ahb_clk>, <&clock_gcc clk_csi1_clk_src>, <&clock_gcc clk_gcc_camss_csi1_clk>, <&clock_gcc clk_gcc_camss_csi1phy_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_gcc_camss_csi1rdi_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_phy_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_phy_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; qcom,clock-rates = <0 0 0 200000000 0 0 0 0 0>; }; qcom,ispif@1b0a000 { cell-index = <0>; compatible = "qcom,ispif-v3.0", "qcom,ispif"; reg = <0x1b0a000 0x500>, <0x1b00020 0x10>; reg-names = "ispif", "csi_clk_mux"; interrupts = <0 55 0>; interrupt-names = "ispif"; clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>, <&clock_gcc clk_csi0_clk_src>, <&clock_gcc clk_gcc_camss_csi0_clk>, <&clock_gcc clk_gcc_camss_csi0pix_clk>, <&clock_gcc clk_gcc_camss_csi0rdi_clk>, <&clock_gcc clk_csi1_clk_src>, <&clock_gcc clk_gcc_camss_csi1_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_gcc_camss_csi1rdi_clk>, <&clock_gcc clk_csi1_clk_src>, <&clock_gcc clk_gcc_camss_csi1_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_gcc_camss_csi1rdi_clk>, <&clock_gcc clk_csi1_clk_src>, <&clock_gcc clk_gcc_camss_csi1_clk>, <&clock_gcc clk_gcc_camss_csi1pix_clk>, <&clock_gcc clk_gcc_camss_csi1rdi_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_csi_vfe0_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_csi_vfe0_clk>; clock-names = "ispif_ahb_clk","camss_ahb_clk", "csi0_src_clk", "csi0_clk", "csi0_pix_clk","csi0_rdi_clk", "csi1_src_clk", "csi1_clk", "csi1_pix_clk", "csi1_rdi_clk", "csi2_src_clk","csi2_clk", "csi2_pix_clk","csi2_rdi_clk", "csi3_src_clk","csi3_clk", "csi3_pix_clk", "csi3_rdi_clk", "vfe0_clk_src", "camss_vfe_vfe0_clk", "camss_csi_vfe0_clk","vfe1_clk_src","camss_vfe_vfe1_clk", "camss_csi_vfe1_clk"; qcom,clock-names = "ispif_ahb_clk", "camss_ahb_clk"; qcom,clock-rates = <0 0>; }; qcom,vfe@1b10000 { cell-index = <0>; compatible = "qcom,vfe40"; reg = <0x1b10000 0x1000>, <0x1b40000 0x200>; reg-names = "vfe", "vfe_vbif"; interrupts = <0 57 0>; interrupt-names = "vfe"; vdd-supply = <&gdsc_vfe>; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_csi_vfe0_clk>, <&clock_gcc clk_gcc_camss_vfe_ahb_clk>, <&clock_gcc clk_gcc_camss_vfe_axi_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk", "bus_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk", "bus_clk", "camss_ahb_clk"; qcom,clock-rates = <0 266670000 0 0 0 0 0>; }; qcom,jpeg@1b1c000 { cell-index = <0>; compatible = "qcom,jpeg"; reg = <0x1b1c000 0x400>, <0x1b60000 0xc30>; reg-names = "jpeg"; interrupts = <0 59 0>; interrupt-names = "jpeg"; vdd-supply = <&gdsc_jpeg>; clocks = <&clock_gcc clk_gcc_camss_jpeg0_clk>, <&clock_gcc clk_gcc_camss_jpeg_ahb_clk>, <&clock_gcc clk_gcc_camss_jpeg_axi_clk>, <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "core_clk", "iface_clk", "bus_clk0", "camss_top_ahb_clk", "camss_ahb_clk"; qcom,clock-names = "core_clk", "iface_clk", "bus_clk0", "camss_top_ahb_clk", "camss_ahb_clk"; qcom,clock-rates = <266670000 0 0 0 0>; }; qcom,irqrouter@1b00000 { cell-index = <0>; compatible = "qcom,irqrouter"; reg = <0x1b00000 0x100>; reg-names = "irqrouter"; }; qcom,cpp@1b04000 { cell-index = <0>; compatible = "qcom,cpp"; reg = <0x1b04000 0x100>, <0x1b40000 0x200>, <0x1b18000 0x018>; reg-names = "cpp", "cpp_vbif", "cpp_hw"; interrupts = <0 49 0>; interrupt-names = "cpp"; vdd-supply = <&gdsc_vfe>; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_vfe_ahb_clk>, <&clock_gcc clk_gcc_camss_cpp_clk>, <&clock_gcc clk_gcc_camss_cpp_ahb_clk>, <&clock_gcc clk_gcc_camss_vfe_axi_clk>, <&clock_gcc clk_gcc_camss_micro_ahb_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "iface_clk", "cpp_core_clk", "cpp_iface_clk", "cpp_bus_clk", "micro_iface_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "iface_clk", "cpp_core_clk", "cpp_iface_clk", "cpp_bus_clk", "micro_iface_clk", "camss_ahb_clk"; qcom,clock-rates = <0 320000000 0 80000000 320000000 0 0 0 0>; }; cci: qcom,cci@1b0c000 { cell-index = <0>; compatible = "qcom,cci"; reg = <0x1b0c000 0x1000>; #address-cells = <1>; #size-cells = <0>; reg-names = "cci"; interrupts = <0 50 0>; interrupt-names = "cci"; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_cci_clk_src>, <&clock_gcc clk_gcc_camss_cci_ahb_clk>, <&clock_gcc clk_gcc_camss_cci_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "cci_src_clk", "cci_ahb_clk", "cci_clk", "camss_ahb_clk"; qcom,clock-names = "camss_top_ahb_clk", "cci_src_clk", "cci_ahb_clk", "cci_clk", "camss_ahb_clk"; qcom,clock-rates = <0 19200000 80000000 0 0>; pinctrl-names = "cci_default", "cci_suspend"; pinctrl-0 = <&cci0_default>; pinctrl-1 = <&cci0_sleep>; gpios = <&msm_gpio 29 0>, <&msm_gpio 30 0>; qcom,gpio-tbl-num = <0 1>; qcom,gpio-tbl-flags = <1 1>; qcom,gpio-tbl-label = "CCI_I2C_DATA0", "CCI_I2C_CLK0"; i2c_freq_100Khz: qcom,i2c_standard_mode { status = "disabled"; }; i2c_freq_400Khz: qcom,i2c_fast_mode { status = "disabled"; }; i2c_freq_custom: qcom,i2c_custom_mode { status = "disabled"; }; }; }; &i2c_freq_100Khz { qcom,hw-thigh = <78>; qcom,hw-tlow = <114>; qcom,hw-tsu-sto = <28>; qcom,hw-tsu-sta = <28>; qcom,hw-thd-dat = <10>; qcom,hw-thd-sta = <77>; qcom,hw-tbuf = <118>; qcom,hw-scl-stretch-en = <0>; qcom,hw-trdhld = <6>; qcom,hw-tsp = <1>; status = "ok"; }; &i2c_freq_400Khz { qcom,hw-thigh = <20>; qcom,hw-tlow = <28>; qcom,hw-tsu-sto = <21>; qcom,hw-tsu-sta = <21>; qcom,hw-thd-dat = <13>; qcom,hw-thd-sta = <18>; qcom,hw-tbuf = <25>; qcom,hw-scl-stretch-en = <0>; qcom,hw-trdhld = <6>; qcom,hw-tsp = <3>; status = "ok"; }; &i2c_freq_custom { qcom,hw-thigh = <15>; qcom,hw-tlow = <28>; qcom,hw-tsu-sto = <21>; qcom,hw-tsu-sta = <21>; qcom,hw-thd-dat = <13>; qcom,hw-thd-sta = <18>; qcom,hw-tbuf = <25>; qcom,hw-scl-stretch-en = <1>; qcom,hw-trdhld = <6>; qcom,hw-tsp = <3>; status = "ok"; };
arch/arm/boot/dts/qcom/msm8916-cdp.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ #include "msm8916.dtsi" #include "msm8916-pinctrl.dtsi" #include "msm8916-camera-sensor-cdp.dtsi" / { aliases { Loading
arch/arm/boot/dts/qcom/msm8916-mtp.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ #include "msm8916.dtsi" #include "msm8916-pinctrl.dtsi" #include "msm8916-camera-sensor-mtp.dtsi" / { aliases { Loading