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Commit 5fffddb1 authored by Padmanabhan Komanduru's avatar Padmanabhan Komanduru
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msm: mdss: fix clearing interrupts of DSI0 during isr for DSI1



Currently we need to handle DSI-1 interrupts only for panel/DCS
commands in the software during broadcast mode. When we handle
isr for DSI-1 interrupt, we clear all the interrupts for DSI-0
also. This might cause timeout issues for waits on DSI-0
interrupts like CMD_MDP_DONE since the interrupt is cleared
and we do not handle the interrupt for DSI-0. Fix this issue
by clearing only the DMA_DONE interrupt for DSI-0 during the
isr handling for DSI-1.

Change-Id: Id1735673f94066ff6c7250eaef7d9394b0525c2f
Signed-off-by: default avatarPadmanabhan Komanduru <pkomandu@codeaurora.org>
parent 59acb37c
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+3 −1
Original line number Diff line number Diff line
@@ -1483,7 +1483,9 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr)
			u32 isr0;
			isr0 = MIPI_INP(left_ctrl_pdata->ctrl_base
						+ 0x0110);/* DSI_INTR_CTRL */
			MIPI_OUTP(left_ctrl_pdata->ctrl_base + 0x0110, isr0);
			if (isr0 & DSI_INTR_CMD_DMA_DONE)
				MIPI_OUTP(left_ctrl_pdata->ctrl_base + 0x0110,
					DSI_INTR_CMD_DMA_DONE);
		}

	pr_debug("%s: ndx=%d isr=%x\n", __func__, ctrl->ndx, isr);