Loading drivers/mmc/host/sdhci-msm.c +8 −1 Original line number Diff line number Diff line Loading @@ -103,6 +103,9 @@ enum sdc_mpm_pin_state { #define CORE_HC_SELECT_IN_HS400 (6 << 19) #define CORE_HC_SELECT_IN_MASK (7 << 19) #define CORE_VENDOR_SPEC_CAPABILITIES0 0x11C #define CORE_SYS_BUS_SUPPORT_64_BIT 28 #define CORE_VENDOR_SPEC_ADMA_ERR_ADDR0 0x114 #define CORE_VENDOR_SPEC_ADMA_ERR_ADDR1 0x118 Loading Loading @@ -3107,7 +3110,11 @@ static int sdhci_msm_probe(struct platform_device *pdev) } } if (dma_supported(mmc_dev(host->mmc), DMA_BIT_MASK(32))) { if ((sdhci_readl(host, SDHCI_CAPABILITIES) & SDHCI_CAN_64BIT) && (dma_supported(mmc_dev(host->mmc), DMA_BIT_MASK(64)))) { host->dma_mask = DMA_BIT_MASK(64); mmc_dev(host->mmc)->dma_mask = &host->dma_mask; } else if (dma_supported(mmc_dev(host->mmc), DMA_BIT_MASK(32))) { host->dma_mask = DMA_BIT_MASK(32); mmc_dev(host->mmc)->dma_mask = &host->dma_mask; } else { Loading Loading
drivers/mmc/host/sdhci-msm.c +8 −1 Original line number Diff line number Diff line Loading @@ -103,6 +103,9 @@ enum sdc_mpm_pin_state { #define CORE_HC_SELECT_IN_HS400 (6 << 19) #define CORE_HC_SELECT_IN_MASK (7 << 19) #define CORE_VENDOR_SPEC_CAPABILITIES0 0x11C #define CORE_SYS_BUS_SUPPORT_64_BIT 28 #define CORE_VENDOR_SPEC_ADMA_ERR_ADDR0 0x114 #define CORE_VENDOR_SPEC_ADMA_ERR_ADDR1 0x118 Loading Loading @@ -3107,7 +3110,11 @@ static int sdhci_msm_probe(struct platform_device *pdev) } } if (dma_supported(mmc_dev(host->mmc), DMA_BIT_MASK(32))) { if ((sdhci_readl(host, SDHCI_CAPABILITIES) & SDHCI_CAN_64BIT) && (dma_supported(mmc_dev(host->mmc), DMA_BIT_MASK(64)))) { host->dma_mask = DMA_BIT_MASK(64); mmc_dev(host->mmc)->dma_mask = &host->dma_mask; } else if (dma_supported(mmc_dev(host->mmc), DMA_BIT_MASK(32))) { host->dma_mask = DMA_BIT_MASK(32); mmc_dev(host->mmc)->dma_mask = &host->dma_mask; } else { Loading