Loading arch/arm/boot/dts/qcom/msm8992.dtsi +2 −4 Original line number Diff line number Diff line Loading @@ -3050,10 +3050,8 @@ }; &gdsc_vfe { clock-names = "bus_clk", "core0_clk", "core1_clk"; clocks = <&clock_mmss clk_camss_vfe_vfe_axi_clk>, <&clock_mmss clk_camss_vfe_vfe0_clk>, <&clock_mmss clk_camss_vfe_vfe1_clk>; clock-names = "bus_clk"; clocks = <&clock_mmss clk_camss_vfe_vfe_axi_clk>; parent-supply = <&gdsc_camss_top>; status = "ok"; }; Loading drivers/clk/qcom/clock-mmss-8992.c +2 −0 Original line number Diff line number Diff line Loading @@ -1612,6 +1612,7 @@ static struct branch_clk camss_top_ahb_clk = { static struct branch_clk camss_vfe_vfe0_clk = { .cbcr_reg = CAMSS_VFE_VFE0_CBCR, .has_sibling = 0, .toggle_memory = true, .base = &virt_base, .c = { .dbg_name = "camss_vfe_vfe0_clk", Loading @@ -1624,6 +1625,7 @@ static struct branch_clk camss_vfe_vfe0_clk = { static struct branch_clk camss_vfe_vfe1_clk = { .cbcr_reg = CAMSS_VFE_VFE1_CBCR, .has_sibling = 0, .toggle_memory = true, .base = &virt_base, .c = { .dbg_name = "camss_vfe_vfe1_clk", Loading Loading
arch/arm/boot/dts/qcom/msm8992.dtsi +2 −4 Original line number Diff line number Diff line Loading @@ -3050,10 +3050,8 @@ }; &gdsc_vfe { clock-names = "bus_clk", "core0_clk", "core1_clk"; clocks = <&clock_mmss clk_camss_vfe_vfe_axi_clk>, <&clock_mmss clk_camss_vfe_vfe0_clk>, <&clock_mmss clk_camss_vfe_vfe1_clk>; clock-names = "bus_clk"; clocks = <&clock_mmss clk_camss_vfe_vfe_axi_clk>; parent-supply = <&gdsc_camss_top>; status = "ok"; }; Loading
drivers/clk/qcom/clock-mmss-8992.c +2 −0 Original line number Diff line number Diff line Loading @@ -1612,6 +1612,7 @@ static struct branch_clk camss_top_ahb_clk = { static struct branch_clk camss_vfe_vfe0_clk = { .cbcr_reg = CAMSS_VFE_VFE0_CBCR, .has_sibling = 0, .toggle_memory = true, .base = &virt_base, .c = { .dbg_name = "camss_vfe_vfe0_clk", Loading @@ -1624,6 +1625,7 @@ static struct branch_clk camss_vfe_vfe0_clk = { static struct branch_clk camss_vfe_vfe1_clk = { .cbcr_reg = CAMSS_VFE_VFE1_CBCR, .has_sibling = 0, .toggle_memory = true, .base = &virt_base, .c = { .dbg_name = "camss_vfe_vfe1_clk", Loading