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Commit 5cbea2d7 authored by Taniya Das's avatar Taniya Das
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ARM: dts: msm: Limit DDR to 200MHz for APSS frequency 



For APSS frequency of 787MHz, DDR frequency still required to be at SVS of
BIMC frequency.

CRs-Fixed: 644461
Change-Id: If129291f544adec30792ca20bfbfefb44141ef53
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 6ddb099c
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