Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5c818806 authored by Bamidi RaviKiran's avatar Bamidi RaviKiran Committed by Ravi Kumar Siddojigari
Browse files

ARM: DTS: msm: Add i2c-7,10 and serial ports 1,2 for 8092 



Add support for i2c-7,10 and BLSP2 UART0,3 for 8092.

Change-Id: Ibf9a045ac20caaef0fe9e556cdf35fcb25038517
Signed-off-by: default avatarBamidi RaviKiran <bamidir@codeaurora.org>
parent 63a67de8

arch/arm/boot/dts/qcom/mpq8092.dtsi

+59 −1
Original line number Diff line number Diff line
@@ -20,9 +20,13 @@ 


	aliases {

		i2c2 = &i2c_2;

		i2c7 = &i2c_7;

		i2c10 = &i2c_10;

		i2c11 = &i2c_11;

		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */

		sdhc2 = &sdhc_2; /* SDC2 SD card slot */

		serial1 = &blsp2_uart0;

		serial2 = &blsp2_uart3;

	};



	memory {
@@ -178,6 +182,20 @@ 
		status = "disabled";

	};



	blsp2_uart0: serial@f995d000 {

		compatible = "qcom,msm-lsuart-v14";

		reg = <0xf995d000 0x1000>;

		interrupts = <0 113 0>;

		status = "disabled";

	};



	blsp2_uart3: serial@f9960000 {

		compatible = "qcom,msm-lsuart-v14";

		reg = <0xf9960000 0x1000>;

		interrupts = <0 116 0>;

		status = "disabled";

	};



	qcom,msm-imem@fe805000 {

		compatible = "qcom,msm-imem";

		reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
@@ -603,7 +621,7 @@ 
		#size-cells = <0>;

		reg-names = "qup_phys_addr", "bam_phys_addr";

		reg = <0xf9924000 0x1000>,

		      <0xf9904000 0x11000>;

		      <0xf9904000 0x19000>;

		interrupt-names = "qup_irq", "bam_irq";

		interrupts = <0 96 0>, <0 238 0>;

		qcom,clk-freq-out = <100000>;
@@ -617,6 +635,46 @@ 
		qcom,master-id = <86>;

	};



	i2c_7: i2c@f9963000 { /* BLSP2 QUP0 */

		compatible = "qcom,i2c-msm-v2";

		#address-cells = <1>;

		#size-cells = <0>;

		reg-names = "qup_phys_addr", "bam_phys_addr";

		reg = <0xf9963000 0x1000>,

		      <0xf9944000 0x19000>;

		interrupt-names = "qup_irq", "bam_irq";

		interrupts = <0 101 0>, <0 239 0>;

		qcom,clk-freq-out = <100000>;

		qcom,clk-freq-in  = <19200000>;

		qcom,gpio-sda = <&msmgpio 14 0>;

		qcom,gpio-scl = <&msmgpio 15 0>;

		qcom,noise-rjct-scl = <0>;

		qcom,noise-rjct-sda = <0>;

		qcom,bam-pipe-idx-cons = <12>;

		qcom,bam-pipe-idx-prod = <13>;

		qcom,master-id = <84>;

	};



	i2c_10: i2c@f9966000 { /* BLSP2 QUP4 */

		compatible = "qcom,i2c-msm-v2";

		#address-cells = <1>;

		#size-cells = <0>;

		reg-names = "qup_phys_addr", "bam_phys_addr";

		reg = <0xf9966000 0x1000>,

		      <0xf9944000 0x19000>;

		interrupt-names = "qup_irq", "bam_irq";

		interrupts = <0 104 0>, <0 239 0>;

		qcom,clk-freq-out = <100000>;

		qcom,clk-freq-in  = <19200000>;

		qcom,gpio-sda = <&msmgpio 61 0>;

		qcom,gpio-scl = <&msmgpio 62 0>;

		qcom,noise-rjct-scl = <0>;

		qcom,noise-rjct-sda = <0>;

		qcom,bam-pipe-idx-cons = <18>;

		qcom,bam-pipe-idx-prod = <19>;

		qcom,master-id = <84>;

	};



	i2c_11: i2c@f9967000 { /* BLSP2 QUP5 */

		compatible = "qcom,i2c-msm-v2";

		#address-cells = <1>;