Commit 5b8b0270 authored Jan 15, 2015 by Karthik Parsha

soc: cpu_pwr_ctl: Fix enabling of l2 lpms after cpu coldboot



l2 lpms are disabled when a clusters first core is being brought online.
Once the core is brought out of reset, l2 lpms are re-enabled. Bit 0 of
the power control override register was being inadvertently set to 1.
This would leave the l2 lpms disabled. Correct this by setting the bit
to 0, to enable the l2 lpms.

Change-Id: Ib45af2bcadef8c4bdb22dd263480b5d4b952d23c
Signed-off-by: Karthik Parsha <kparsha@codeaurora.org>

parent e3a543d6

drivers/soc/qcom/cpu_pwr_ctl.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -471,7 +471,7 @@ int msm8994_unclamp_secondary_arm_cpu(unsigned int cpu)
		goto out_acc_reg;

		val = scm_io_read((u32)res.start);
		val &= BIT(0);
		val &= ~BIT(0);
		scm_io_write((u32)res.start, val);

		out_acc_reg: