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Commit 5b32470c authored by Venkat Gopalakrishnan's avatar Venkat Gopalakrishnan Committed by Maya Erez
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ARM: dts: msm: define multiple latency and affinity masks for msm8994



To accomodate both big/little cluster voting for pm qos, add multiple
values for cpu-dma-latency and cpu-affinity-mask. The first value in the
array applies for little cluster and the second value applies for big
cluster.

Change-Id: I40234b00439ce5f7a6aba83064e0914a254317e4
Signed-off-by: default avatarVenkat Gopalakrishnan <venkatg@codeaurora.org>
parent fbc0b6c1
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+6 −6
Original line number Diff line number Diff line
@@ -1094,9 +1094,9 @@
		interrupt-names = "hc_irq", "pwr_irq";

		qcom,bus-width = <8>;
		qcom,cpu-dma-latency-us = <301>;
		qcom,cpu-dma-latency-us = <301 70>;
		qcom,cpu-affinity = "affine_cores";
		qcom,cpu-affinity-mask = <0x0f>;
		qcom,cpu-affinity-mask = <0x0f 0xf0>;

		qcom,msm-bus,name = "sdhc1";
		qcom,msm-bus,num-cases = <9>;
@@ -1133,9 +1133,9 @@
			 <&clock_gcc clk_gcc_sdcc2_apps_clk>;

		qcom,bus-width = <4>;
		qcom,cpu-dma-latency-us = <301>;
		qcom,cpu-dma-latency-us = <301 70>;
		qcom,cpu-affinity = "affine_cores";
		qcom,cpu-affinity-mask = <0x0f>;
		qcom,cpu-affinity-mask = <0x0f 0xf0>;

		qcom,msm-bus,name = "sdhc2";
		qcom,msm-bus,num-cases = <8>;
@@ -1167,9 +1167,9 @@
			 <&clock_gcc clk_gcc_sdcc3_apps_clk>;

		qcom,bus-width = <4>;
		qcom,cpu-dma-latency-us = <301>;
		qcom,cpu-dma-latency-us = <301 70>;
		qcom,cpu-affinity = "affine_cores";
		qcom,cpu-affinity-mask = <0x0f>;
		qcom,cpu-affinity-mask = <0x0f 0xf0>;

		qcom,msm-bus,name = "sdhc3";
		qcom,msm-bus,num-cases = <8>;