Loading arch/arm64/include/asm/spinlock.h +4 −2 Original line number Diff line number Diff line Loading @@ -140,9 +140,10 @@ static inline int arch_write_trylock(arch_rwlock_t *rw) unsigned int tmp; asm volatile( " ldaxr %w0, %1\n" "2: ldaxr %w0, %1\n" " cbnz %w0, 1f\n" " stxr %w0, %w2, %1\n" " cbnz %w0, 2b\n" "1:\n" : "=&r" (tmp), "+Q" (rw->lock) : "r" (0x80000000) Loading Loading @@ -209,10 +210,11 @@ static inline int arch_read_trylock(arch_rwlock_t *rw) unsigned int tmp, tmp2 = 1; asm volatile( " ldaxr %w0, %2\n" "2: ldaxr %w0, %2\n" " add %w0, %w0, #1\n" " tbnz %w0, #31, 1f\n" " stxr %w1, %w0, %2\n" " cbnz %w1, 2b\n" "1:\n" : "=&r" (tmp), "+r" (tmp2), "+Q" (rw->lock) : Loading Loading
arch/arm64/include/asm/spinlock.h +4 −2 Original line number Diff line number Diff line Loading @@ -140,9 +140,10 @@ static inline int arch_write_trylock(arch_rwlock_t *rw) unsigned int tmp; asm volatile( " ldaxr %w0, %1\n" "2: ldaxr %w0, %1\n" " cbnz %w0, 1f\n" " stxr %w0, %w2, %1\n" " cbnz %w0, 2b\n" "1:\n" : "=&r" (tmp), "+Q" (rw->lock) : "r" (0x80000000) Loading Loading @@ -209,10 +210,11 @@ static inline int arch_read_trylock(arch_rwlock_t *rw) unsigned int tmp, tmp2 = 1; asm volatile( " ldaxr %w0, %2\n" "2: ldaxr %w0, %2\n" " add %w0, %w0, #1\n" " tbnz %w0, #31, 1f\n" " stxr %w1, %w0, %2\n" " cbnz %w1, 2b\n" "1:\n" : "=&r" (tmp), "+r" (tmp2), "+Q" (rw->lock) : Loading