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Commit 5977bfa6 authored by Sujit Reddy Thumma's avatar Sujit Reddy Thumma
Browse files

ARM: dts: msm: Add SDHCI support for msm8939 



Enable SDHC_1 and SDHC_2 slots for MSM8939.
8939 RUMI board doesn't support SDHC_2 slot yet, so
disable by default.

Change-Id: Ic081d2dfa4cd74e0ad582c460c3227ef9326b152
Signed-off-by: default avatarSujit Reddy Thumma <sthumma@codeaurora.org>
parent 2f04273d

arch/arm/boot/dts/qcom/msm8939-pinctrl.dtsi

+110 −0
Original line number Diff line number Diff line
@@ -41,5 +41,115 @@ 
				bias-disable;

			};

		};



		sdhc2_cd_pin {

			qcom,pins = <&gp 38>;

			qcom,num-grp-pins = <1>;

			qcom,pin-func = <0>;

			label = "cd-gpio";

			sdc2_cd_on: cd_on {

				drive-strength = <2>;

				bias-pull-up;

			};

			sdc2_cd_off: cd_off {

				drive-strength = <2>;

				bias-disable;

			};

		};



		/* SDC pin type */

		sdc: sdc {

			qcom,pin-type-sdc;

			/* 0-2 for sdc1 4-6 for sdc2 */

			qcom,num-pins = <7>;

			/* Order of pins */

			/* SDC1: CLK -> 0, CMD -> 1, DATA -> 2 */

			/* SDC2: CLK -> 4, CMD -> 5, DATA -> 6 */

			#qcom,pin-cells = <1>;

		};



		pmx_sdc1_clk {

			qcom,pins = <&sdc 0>;

			qcom,num-grp-pins = <1>;

			label = "sdc1-clk";

			sdc1_clk_on: clk_on {

				bias-disable; /* NO pull */

				drive-strength = <16>; /* 16 MA */

			};

			sdc1_clk_off: clk_off {

				bias-disable; /* NO pull */

				drive-strength = <2>; /* 2 MA */

			};

		};



		pmx_sdc1_cmd {

			qcom,pins = <&sdc 1>;

			qcom,num-grp-pins = <1>;

			label = "sdc1-cmd";

			sdc1_cmd_on: cmd_on {

				bias-pull-up; /* pull up */

				drive-strength = <10>; /* 10 MA */

			};

			sdc1_cmd_off: cmd_off {

				bias-pull-up; /* pull up */

				drive-strength = <2>; /* 2 MA */

			};

		};



		pmx_sdc1_data {

			qcom,pins = <&sdc 2>;

			qcom,num-grp-pins = <1>;

			label = "sdc1-data";

			sdc1_data_on: data_on {

				bias-pull-up; /* pull up */

				drive-strength = <10>; /* 10 MA */

			};

			sdc1_data_off: data_off {

				bias-pull-up; /* pull up */

				drive-strength = <2>; /* 2 MA */

			};

		};



		pmx_sdc2_clk {

			qcom,pins = <&sdc 4>;

			qcom,num-grp-pins = <1>;

			label = "sdc2-clk";

			sdc2_clk_on: clk_on {

				bias-disable; /* NO pull */

				drive-strength = <16>; /* 16 MA */

			};

			sdc2_clk_off: clk_off {

				bias-disable; /* NO pull */

				drive-strength = <2>; /* 2 MA */

			};

		};



		pmx_sdc2_cmd {

			qcom,pins = <&sdc 5>;

			qcom,num-grp-pins = <1>;

			label = "sdc2-cmd";

			sdc2_cmd_on: cmd_on {

				bias-pull-up; /* pull up */

				drive-strength = <10>; /* 10 MA */

			};

			sdc2_cmd_off: cmd_off {

				bias-pull-up; /* pull up */

				drive-strength = <2>; /* 2 MA */

			};

		};



		pmx_sdc2_data {

			qcom,pins = <&sdc 6>;

			qcom,num-grp-pins = <1>;

			label = "sdc2-data";

			sdc2_data_on: data_on {

				bias-pull-up; /* pull up */

				drive-strength = <10>; /* 10 MA */

			};

			sdc2_data_off: data_off {

				bias-pull-up; /* pull up */

				drive-strength = <2>; /* 2 MA */

			};

		};

	};

};

arch/arm/boot/dts/qcom/msm8939-rumi.dts

+37 −0
Original line number Diff line number Diff line
@@ -36,3 +36,40 @@ 
	pinctrl-names = "default";

	pinctrl-0 = <&uart_console_sleep>;

};



&sdhc_1 {

	vdd-supply = <&pm8916_l8>;

	qcom,vdd-voltage-level = <2900000 2900000>;

	qcom,vdd-current-level = <200 400000>;



	vdd-io-supply = <&pm8916_l5>;

	qcom,vdd-io-voltage-level = <1800000 1800000>;

	qcom,vdd-io-current-level = <200 60000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;

	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;



	qcom,clk-rates = <400000 19200000>;

	qcom,nonremovable;

	/delete-property/ qcom,bus-speed-mode;

	status = "ok";

};



&sdhc_2 {

	vdd-supply = <&pm8916_l11>;

	qcom,vdd-voltage-level = <2800000 2950000>;

	qcom,vdd-current-level = <15000 400000>;



	vdd-io-supply = <&pm8916_l12>;

	qcom,vdd-io-voltage-level = <1800000 2950000>;

	qcom,vdd-io-current-level = <200 50000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;



	qcom,clk-rates = <400000 19200000>;



	status = "disabled";

};

arch/arm/boot/dts/qcom/msm8939-sim.dts

+46 −0
Original line number Diff line number Diff line
@@ -31,3 +31,49 @@ 
	pinctrl-names = "default";

	pinctrl-0 = <&uart_console_sleep>;

};



&sdhc_1 {

	vdd-supply = <&pm8916_l8>;

	qcom,vdd-voltage-level = <2900000 2900000>;

	qcom,vdd-current-level = <200 400000>;



	vdd-io-supply = <&pm8916_l5>;

	qcom,vdd-io-voltage-level = <1800000 1800000>;

	qcom,vdd-io-current-level = <200 60000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;

	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;



	qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";

	qcom,nonremovable;



	status = "ok";

};



&sdhc_2 {

	#address-cells = <0>;

	interrupt-parent = <&sdhc_2>;

	interrupts = <0 1 2>;

	#interrupt-cells = <1>;

	interrupt-map-mask = <0xffffffff>;

	interrupt-map = <0 &intc 0 125 0

			1 &intc 0 221 0

			2 &msm_gpio 38 0>;

	interrupt-names = "hc_irq", "pwr_irq", "status_irq";

	cd-gpios = <&msm_gpio 38 0x1>;



	vdd-supply = <&pm8916_l11>;

	qcom,vdd-voltage-level = <1800000 2950000>;

	qcom,vdd-current-level = <15000 400000>;



	vdd-io-supply = <&pm8916_l12>;

	qcom,vdd-io-voltage-level = <1800000 2950000>;

	qcom,vdd-io-current-level = <200 50000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;



	status = "ok";

};

arch/arm/boot/dts/qcom/msm8939.dtsi

+43 −0
Original line number Diff line number Diff line
@@ -19,6 +19,8 @@ 
	qcom,msm-id = <239 0>, <241 0>;

	interrupt-parent = <&intc>;

	aliases {

		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */

		sdhc2 = &sdhc_2; /* SDC2 SD card slot */

		/* smdtty devices */

		smd1 = &smdtty_apps_fm;

		smd2 = &smdtty_apps_riva_bt_acl;
@@ -601,6 +603,47 @@ 
		cell-index = <0>;

		qcom,not-wakeup; /* Needed until RPM is fully configured */

	};



	sdhc_1: sdhci@7824000 {

		compatible = "qcom,sdhci-msm";

		reg = <0x7824900 0x11c>, <0x7824000 0x800>;

		reg-names = "hc_mem", "core_mem";



		interrupts = <0 123 0>, <0 138 0>;

		interrupt-names = "hc_irq", "pwr_irq";



		qcom,bus-width = <8>;

		qcom,cpu-dma-latency-us = <701>;



		clocks = <&clock_gcc clk_gcc_sdcc1_ahb_clk>,

			 <&clock_gcc clk_gcc_sdcc1_apps_clk>;

		clock-names = "iface_clk", "core_clk";



		qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;

		qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";



		status = "disabled";

	};



	sdhc_2: sdhci@7864000 {

		compatible = "qcom,sdhci-msm";

		reg = <0x7864900 0x11c>, <0x7864000 0x800>;

		reg-names = "hc_mem", "core_mem";



		interrupts = <0 125 0>, <0 221 0>;

		interrupt-names = "hc_irq", "pwr_irq";



		qcom,bus-width = <4>;

		qcom,cpu-dma-latency-us = <701>;



		clocks = <&clock_gcc clk_gcc_sdcc2_ahb_clk>,

			 <&clock_gcc clk_gcc_sdcc2_apps_clk>;

		clock-names = "iface_clk", "core_clk";



		qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;



		status = "disabled";

	};

};



&gdsc_venus {