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Commit 5922f146 authored by Rohit Vaswani's avatar Rohit Vaswani
Browse files

msm: clock-fsm9900: Fix clock for EMAC_TX_CLK and MPM 



Clock source of emac tx clock should be EMAC_0_TX_CLK.

Change-Id: Ie0aa362be0779ec30fd4142e7eecf903f7e1afd5
Acked-by: default avatarKaushik Sikdar <ksikdar@qti.qualcomm.com>
Signed-off-by: default avatarRohit Vaswani <rvaswani@codeaurora.org>
parent 4bb26321

arch/arm/mach-msm/clock-fsm9900.c

+5 −1
Original line number Diff line number Diff line
@@ -347,6 +347,7 @@ static void __iomem *virt_bases[N_BASES]; 
#define sdcc1_gnd_source_val 6

#define pcie_pipe_source_val 2

#define emac0_125m_source_val 1

#define emac0_tx_source_val 2



#define F(f, s, div, m, n) \

	{ \
@@ -2198,7 +2199,7 @@ static struct branch_clk gcc_emac1_sys_25m_clk = { 


static struct clk_freq_tbl ftbl_gcc_emac0_1_tx_clk[] = {

	F(     19200000,              xo,    1, 0, 0),

	F_EXT( 125000000,      emac0_125m,   1, 0, 0),

	F_EXT( 125000000,       emac0_tx,    1, 0, 0),

	F_END

};
@@ -2630,6 +2631,9 @@ static struct clk_lookup fsm_clocks_9900[] = { 
	CLK_LOOKUP("aux_clk",   gpll0_ao_clk_src.c,

					"f9016000.qcom,clock-krait"),

	CLK_LOOKUP("xo_clk",    xo_clk_src.c, ""),



	/* MPM */

	CLK_LOOKUP("xo", xo_clk_src.c, "fc4281d0.qcom,mpm"),

};



static struct pll_config_regs gpll4_regs __initdata = {