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Commit 578f93ce authored by Girish Mahadevan's avatar Girish Mahadevan Committed by Sagar Dharia
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ARM: dts: Modify ocmem related bus vectors for GPU 



Modify the ocmem end point for GPU. This is needed since GPU and video
cores have separate direct accesses to ocmem so its easier to aggregate
for requests from each core. Clock entry is added for ocmem so that
both masters can access ocmem.

Change-Id: Ie84658163548d88e0d26b3da7c61c6c56d2cf368
Signed-off-by: default avatarGirish Mahadevan <girishm@codeaurora.org>
Signed-off-by: default avatarSagar Dharia <sdharia@codeaurora.org>
parent 446a396c

Documentation/devicetree/bindings/arm/msm/msm_bus.txt

+2 −0
Original line number Diff line number Diff line
@@ -81,6 +81,8 @@ qti,mas-hw-id: A unique hardware ID agreed upon by processors across 
qti,slv-hw-id:		A unique hardware ID agreed upon by processors across

			the system. This ID is assigned to every slave. It can

			be used to send slave specific data from

qti,slaveclk-dual:	Dual set (active/sleep) slave clock name

qti,slaveclk-active:	Active set slave clock name

			Apps/Modem/LPASS to RPM.

qti,gateway:		Flag indicating whether a particular node is a gateway.

qti,slavep:		Hardware slave port number(s).

arch/arm/boot/dts/qti/apq8084-bus.dtsi

+15 −4
Original line number Diff line number Diff line
@@ -1334,15 +1334,26 @@ 
			qcom,tier = <2>;

		};



		slv-ocmem {

		slv-ocmemvs {

			cell-id = <604>;

			label = "slv-ocmem";

			label = "slv-ocmemvs";

			qcom,slavep = <0 1>;

			qcom,tier = <2>;

			qcom,buswidth = <16>;

			qcom,slv-hw-id = <18>;

			qcom,slaveclk-dual = "ocmem_clk";

			qcom,slaveclk-active = "ocmem_a_clk";

			qcom,slaveclk-dual = "ocmemvs_clk";

			qcom,slaveclk-active = "ocmemvs_a_clk";

		};



		slv-ocmemgx {

			cell-id = <662>;

			label = "slv-ocmemgx";

			qcom,slavep = <0 1>;

			qcom,tier = <2>;

			qcom,buswidth = <16>;

			qcom,slv-hw-id = <18>;

			qcom,slaveclk-dual = "ocmemgx_clk";

			qcom,slaveclk-active = "ocmemgx_a_clk";

		};



		fab-snoc {

arch/arm/boot/dts/qti/apq8084-gpu.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -34,12 +34,12 @@ 
		qcom,msm-bus,num-cases = <6>;

		qcom,msm-bus,num-paths = <2>;

		qcom,msm-bus,vectors-KBps =

				<26 512 0 0>, <89 604 0 0>,

				<26 512 0 6297600>, <89 604 0 3200000>,

				<26 512 0 8448000>, <89 604 0 4800000>,

				<26 512 0 10598400>, <89 604 0 6224000>,

				<26 512 0 12748800>, <89 604 0 8000000>,

				<26 512 0 17056000>, <89 604 0 9600000>;

				<26 512 0 0>, <89 662 0 0>,

				<26 512 0 6297600>, <89 662 0 3200000>,

				<26 512 0 8448000>, <89 662 0 4800000>,

				<26 512 0 10598400>, <89 662 0 6224000>,

				<26 512 0 12748800>, <89 662 0 8000000>,

				<26 512 0 17056000>, <89 662 0 9600000>;



		/* GDSC oxili regulators */

		vddcx-supply = <&gdsc_oxili_cx>;

arch/arm/mach-msm/clock-8084.c

+4 −2
Original line number Diff line number Diff line
@@ -5816,8 +5816,10 @@ static struct clk_lookup apq_clocks_8084[] = { 
	CLK_LOOKUP("mem_clk",	bimc_msmbus_clk.c,	"msm_bimc"),

	CLK_LOOKUP("mem_a_clk",	bimc_msmbus_a_clk.c,	"msm_bimc"),

	CLK_LOOKUP("mem_clk",	bimc_acpu_a_clk.c,	""),

	CLK_LOOKUP("ocmem_clk",	ocmemgx_msmbus_clk.c,	  "msm_bus"),

	CLK_LOOKUP("ocmem_a_clk", ocmemgx_msmbus_a_clk.c, "msm_bus"),

	CLK_LOOKUP("ocmemgx_clk",	ocmemgx_msmbus_clk.c,	  "msm_bus"),

	CLK_LOOKUP("ocmemgx_a_clk", ocmemgx_msmbus_a_clk.c, "msm_bus"),

	CLK_LOOKUP("ocmemvs_clk",	ocmemnoc_clk_src.c,	  "msm_bus"),

	CLK_LOOKUP("ocmemvs_a_clk",	ocmemnoc_clk_src.c,	  "msm_bus"),

	CLK_LOOKUP("bus_clk",	mmss_s0_axi_clk.c,	"msm_mmss_noc"),

	CLK_LOOKUP("bus_a_clk",	mmss_s0_axi_clk.c,	"msm_mmss_noc"),

	CLK_LOOKUP("dfab_clk", pnoc_sps_clk.c, "msm_sps"),