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This project is archived. Its data is read-only.

Commit 569b216f authored Aug 14, 2014 by Linux Build Service Account Committed by Gerrit - the friendly Code Review server Aug 14, 2014

Merge "ASoC: wcd9xxx: add INP2, INP3, INP4 for IIR paths"

parents 918e46fe f8b76003

sound/soc/codecs/wcd9306.c

+182 −6

Original line number	Diff line number	Diff line
		@@ -1151,6 +1151,14 @@ static const struct snd_kcontrol_new tapan_common_snd_controls[] = {
		0, -84, 40, digital_gain),
		SOC_SINGLE_SX_TLV("IIR1 INP4 Volume", TAPAN_A_CDC_IIR1_GAIN_B4_CTL,
		0, -84, 40, digital_gain),
		SOC_SINGLE_SX_TLV("IIR2 INP1 Volume", TAPAN_A_CDC_IIR2_GAIN_B1_CTL,
		0, -84, 40, digital_gain),
		SOC_SINGLE_SX_TLV("IIR2 INP2 Volume", TAPAN_A_CDC_IIR2_GAIN_B2_CTL,
		0, -84, 40, digital_gain),
		SOC_SINGLE_SX_TLV("IIR2 INP3 Volume", TAPAN_A_CDC_IIR2_GAIN_B3_CTL,
		0, 84, 40, digital_gain),
		SOC_SINGLE_SX_TLV("IIR2 INP4 Volume", TAPAN_A_CDC_IIR2_GAIN_B4_CTL,
		0, -84, 40, digital_gain),

		SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
		SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
		@@ -1320,7 +1328,7 @@ static const char * const anc1_fb_mux_text[] = {
		"ZERO", "EAR_HPH_L", "EAR_LINE_1",
		};

		static const char * const iir1_inp1_text[] = {
		static const char * const iir_inp_text[] = {
		"ZERO", "DEC1", "DEC2", "DEC3", "DEC4",
		"RX1", "RX2", "RX3", "RX4", "RX5"
		};
		@@ -1424,7 +1432,28 @@ static const struct soc_enum anc1_fb_mux_enum =
		SOC_ENUM_SINGLE(TAPAN_A_CDC_CONN_ANC_B2_CTL, 0, 3, anc1_fb_mux_text);

		static const struct soc_enum iir1_inp1_mux_enum =
		SOC_ENUM_SINGLE(TAPAN_A_CDC_CONN_EQ1_B1_CTL, 0, 10, iir1_inp1_text);
		SOC_ENUM_SINGLE(TAPAN_A_CDC_CONN_EQ1_B1_CTL, 0, 10, iir_inp_text);

		static const struct soc_enum iir1_inp2_mux_enum =
		SOC_ENUM_SINGLE(TAPAN_A_CDC_CONN_EQ1_B2_CTL, 0, 10, iir_inp_text);

		static const struct soc_enum iir1_inp3_mux_enum =
		SOC_ENUM_SINGLE(TAPAN_A_CDC_CONN_EQ1_B3_CTL, 0, 10, iir_inp_text);

		static const struct soc_enum iir1_inp4_mux_enum =
		SOC_ENUM_SINGLE(TAPAN_A_CDC_CONN_EQ1_B4_CTL, 0, 10, iir_inp_text);

		static const struct soc_enum iir2_inp1_mux_enum =
		SOC_ENUM_SINGLE(TAPAN_A_CDC_CONN_EQ2_B1_CTL, 0, 10, iir_inp_text);

		static const struct soc_enum iir2_inp2_mux_enum =
		SOC_ENUM_SINGLE(TAPAN_A_CDC_CONN_EQ2_B2_CTL, 0, 10, iir_inp_text);

		static const struct soc_enum iir2_inp3_mux_enum =
		SOC_ENUM_SINGLE(TAPAN_A_CDC_CONN_EQ2_B3_CTL, 0, 10, iir_inp_text);

		static const struct soc_enum iir2_inp4_mux_enum =
		SOC_ENUM_SINGLE(TAPAN_A_CDC_CONN_EQ2_B4_CTL, 0, 10, iir_inp_text);

		static const struct snd_kcontrol_new rx_mix1_inp1_mux =
		SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
		@@ -1603,6 +1632,27 @@ static const struct snd_kcontrol_new dec4_mux =
		static const struct snd_kcontrol_new iir1_inp1_mux =
		SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);

		static const struct snd_kcontrol_new iir1_inp2_mux =
		SOC_DAPM_ENUM("IIR1 INP2 Mux", iir1_inp2_mux_enum);

		static const struct snd_kcontrol_new iir1_inp3_mux =
		SOC_DAPM_ENUM("IIR1 INP3 Mux", iir1_inp3_mux_enum);

		static const struct snd_kcontrol_new iir1_inp4_mux =
		SOC_DAPM_ENUM("IIR1 INP4 Mux", iir1_inp4_mux_enum);

		static const struct snd_kcontrol_new iir2_inp1_mux =
		SOC_DAPM_ENUM("IIR2 INP1 Mux", iir2_inp1_mux_enum);

		static const struct snd_kcontrol_new iir2_inp2_mux =
		SOC_DAPM_ENUM("IIR2 INP2 Mux", iir2_inp2_mux_enum);

		static const struct snd_kcontrol_new iir2_inp3_mux =
		SOC_DAPM_ENUM("IIR2 INP3 Mux", iir2_inp3_mux_enum);

		static const struct snd_kcontrol_new iir2_inp4_mux =
		SOC_DAPM_ENUM("IIR2 INP4 Mux", iir2_inp4_mux_enum);

		static const struct snd_kcontrol_new anc1_mux =
		SOC_DAPM_ENUM("ANC1 MUX Mux", anc1_mux_enum);

		@@ -3162,12 +3212,14 @@ static const struct snd_soc_dapm_route audio_map[] = {
		{"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
		{"RX1 MIX1 INP1", "RX5", "SLIM RX5"},
		{"RX1 MIX1 INP1", "IIR1", "IIR1"},
		{"RX1 MIX1 INP1", "IIR2", "IIR2"},
		{"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
		{"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
		{"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
		{"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
		{"RX1 MIX1 INP2", "RX5", "SLIM RX5"},
		{"RX1 MIX1 INP2", "IIR1", "IIR1"},
		{"RX1 MIX1 INP2", "IIR2", "IIR2"},
		{"RX1 MIX1 INP3", "RX1", "SLIM RX1"},
		{"RX1 MIX1 INP3", "RX2", "SLIM RX2"},
		{"RX1 MIX1 INP3", "RX3", "SLIM RX3"},
		@@ -3179,30 +3231,39 @@ static const struct snd_soc_dapm_route audio_map[] = {
		{"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
		{"RX2 MIX1 INP1", "RX5", "SLIM RX5"},
		{"RX2 MIX1 INP1", "IIR1", "IIR1"},
		{"RX2 MIX1 INP1", "IIR2", "IIR2"},
		{"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
		{"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
		{"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
		{"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
		{"RX2 MIX1 INP2", "RX5", "SLIM RX5"},
		{"RX2 MIX1 INP2", "IIR1", "IIR1"},
		{"RX2 MIX1 INP2", "IIR2", "IIR2"},
		{"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
		{"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
		{"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
		{"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
		{"RX3 MIX1 INP1", "RX5", "SLIM RX5"},
		{"RX3 MIX1 INP1", "IIR1", "IIR1"},
		{"RX3 MIX1 INP1", "IIR2", "IIR2"},
		{"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
		{"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
		{"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
		{"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
		{"RX3 MIX1 INP2", "RX5", "SLIM RX5"},
		{"RX3 MIX1 INP2", "IIR1", "IIR1"},
		{"RX3 MIX1 INP2", "IIR2", "IIR2"},

		{"RX1 MIX2 INP1", "IIR1", "IIR1"},
		{"RX1 MIX2 INP2", "IIR1", "IIR1"},
		{"RX2 MIX2 INP1", "IIR1", "IIR1"},
		{"RX2 MIX2 INP2", "IIR1", "IIR1"},

		{"RX1 MIX2 INP1", "IIR2", "IIR2"},
		{"RX1 MIX2 INP2", "IIR2", "IIR2"},
		{"RX2 MIX2 INP1", "IIR2", "IIR2"},
		{"RX2 MIX2 INP2", "IIR2", "IIR2"},

		/* Decimator Inputs */
		{"DEC1 MUX", "ADC1", "ADC1"},
		{"DEC1 MUX", "ADC2", "ADC2"},
		@@ -3233,10 +3294,6 @@ static const struct snd_soc_dapm_route audio_map[] = {
		{"LINEOUT1_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
		{"LINEOUT2_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},

		{"IIR1", NULL, "IIR1 INP1 MUX"},
		{"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
		{"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},

		{"MIC BIAS1 Internal1", NULL, "LDO_H"},
		{"MIC BIAS1 Internal2", NULL, "LDO_H"},
		{"MIC BIAS1 External", NULL, "LDO_H"},
		@@ -3245,6 +3302,95 @@ static const struct snd_soc_dapm_route audio_map[] = {
		{"MIC BIAS2 Internal3", NULL, "LDO_H"},
		{"MIC BIAS2 External", NULL, "LDO_H"},
		{DAPM_MICBIAS2_EXTERNAL_STANDALONE, NULL, "LDO_H Standalone"},

		/sidetone path enable/
		{"IIR1", NULL, "IIR1 INP1 MUX"},
		{"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
		{"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
		{"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
		{"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
		{"IIR1 INP1 MUX", "RX1", "SLIM RX1"},
		{"IIR1 INP1 MUX", "RX2", "SLIM RX2"},
		{"IIR1 INP1 MUX", "RX3", "SLIM RX3"},
		{"IIR1 INP1 MUX", "RX4", "SLIM RX4"},
		{"IIR1 INP1 MUX", "RX5", "SLIM RX5"},

		{"IIR1", NULL, "IIR1 INP2 MUX"},
		{"IIR1 INP2 MUX", "DEC1", "DEC1 MUX"},
		{"IIR1 INP2 MUX", "DEC2", "DEC2 MUX"},
		{"IIR1 INP2 MUX", "DEC3", "DEC3 MUX"},
		{"IIR1 INP2 MUX", "DEC4", "DEC4 MUX"},
		{"IIR1 INP2 MUX", "RX1", "SLIM RX1"},
		{"IIR1 INP2 MUX", "RX2", "SLIM RX2"},
		{"IIR1 INP2 MUX", "RX3", "SLIM RX3"},
		{"IIR1 INP2 MUX", "RX4", "SLIM RX4"},
		{"IIR1 INP2 MUX", "RX5", "SLIM RX5"},

		{"IIR1", NULL, "IIR1 INP3 MUX"},
		{"IIR1 INP3 MUX", "DEC1", "DEC1 MUX"},
		{"IIR1 INP3 MUX", "DEC2", "DEC2 MUX"},
		{"IIR1 INP3 MUX", "DEC3", "DEC3 MUX"},
		{"IIR1 INP3 MUX", "DEC4", "DEC4 MUX"},
		{"IIR1 INP3 MUX", "RX1", "SLIM RX1"},
		{"IIR1 INP3 MUX", "RX2", "SLIM RX2"},
		{"IIR1 INP3 MUX", "RX3", "SLIM RX3"},
		{"IIR1 INP3 MUX", "RX4", "SLIM RX4"},
		{"IIR1 INP3 MUX", "RX5", "SLIM RX5"},

		{"IIR1", NULL, "IIR1 INP4 MUX"},
		{"IIR1 INP4 MUX", "DEC1", "DEC1 MUX"},
		{"IIR1 INP4 MUX", "DEC2", "DEC2 MUX"},
		{"IIR1 INP4 MUX", "DEC3", "DEC3 MUX"},
		{"IIR1 INP4 MUX", "DEC4", "DEC4 MUX"},
		{"IIR1 INP4 MUX", "RX1", "SLIM RX1"},
		{"IIR1 INP4 MUX", "RX2", "SLIM RX2"},
		{"IIR1 INP4 MUX", "RX3", "SLIM RX3"},
		{"IIR1 INP4 MUX", "RX4", "SLIM RX4"},
		{"IIR1 INP4 MUX", "RX5", "SLIM RX5"},

		{"IIR2", NULL, "IIR2 INP1 MUX"},
		{"IIR2 INP1 MUX", "DEC1", "DEC1 MUX"},
		{"IIR2 INP1 MUX", "DEC2", "DEC2 MUX"},
		{"IIR2 INP1 MUX", "DEC3", "DEC3 MUX"},
		{"IIR2 INP1 MUX", "DEC4", "DEC4 MUX"},
		{"IIR2 INP1 MUX", "RX1", "SLIM RX1"},
		{"IIR2 INP1 MUX", "RX2", "SLIM RX2"},
		{"IIR2 INP1 MUX", "RX3", "SLIM RX3"},
		{"IIR2 INP1 MUX", "RX4", "SLIM RX4"},
		{"IIR2 INP1 MUX", "RX5", "SLIM RX5"},

		{"IIR2", NULL, "IIR2 INP2 MUX"},
		{"IIR2 INP2 MUX", "DEC1", "DEC1 MUX"},
		{"IIR2 INP2 MUX", "DEC2", "DEC2 MUX"},
		{"IIR2 INP2 MUX", "DEC3", "DEC3 MUX"},
		{"IIR2 INP2 MUX", "DEC4", "DEC4 MUX"},
		{"IIR2 INP2 MUX", "RX1", "SLIM RX1"},
		{"IIR2 INP2 MUX", "RX2", "SLIM RX2"},
		{"IIR2 INP2 MUX", "RX3", "SLIM RX3"},
		{"IIR2 INP2 MUX", "RX4", "SLIM RX4"},
		{"IIR2 INP2 MUX", "RX5", "SLIM RX5"},

		{"IIR2", NULL, "IIR2 INP3 MUX"},
		{"IIR2 INP3 MUX", "DEC1", "DEC1 MUX"},
		{"IIR2 INP3 MUX", "DEC2", "DEC2 MUX"},
		{"IIR2 INP3 MUX", "DEC3", "DEC3 MUX"},
		{"IIR2 INP3 MUX", "DEC4", "DEC4 MUX"},
		{"IIR2 INP3 MUX", "RX1", "SLIM RX1"},
		{"IIR2 INP3 MUX", "RX2", "SLIM RX2"},
		{"IIR2 INP3 MUX", "RX3", "SLIM RX3"},
		{"IIR2 INP3 MUX", "RX4", "SLIM RX4"},
		{"IIR2 INP3 MUX", "RX5", "SLIM RX5"},

		{"IIR2", NULL, "IIR2 INP4 MUX"},
		{"IIR2 INP4 MUX", "DEC1", "DEC1 MUX"},
		{"IIR2 INP4 MUX", "DEC2", "DEC2 MUX"},
		{"IIR2 INP4 MUX", "DEC3", "DEC3 MUX"},
		{"IIR2 INP4 MUX", "DEC4", "DEC4 MUX"},
		{"IIR2 INP4 MUX", "RX1", "SLIM RX1"},
		{"IIR2 INP4 MUX", "RX2", "SLIM RX2"},
		{"IIR2 INP4 MUX", "RX3", "SLIM RX3"},
		{"IIR2 INP4 MUX", "RX4", "SLIM RX4"},
		{"IIR2 INP4 MUX", "RX5", "SLIM RX5"},
		};

		static const struct snd_soc_dapm_route wcd9302_map[] = {
		@@ -4829,6 +4975,36 @@ static const struct snd_soc_dapm_widget tapan_common_dapm_widgets[] = {
		SND_SOC_DAPM_PGA_E("IIR1", TAPAN_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0,
		tapan_codec_set_iir_gain, SND_SOC_DAPM_POST_PMU),

		SND_SOC_DAPM_MUX_E("IIR1 INP2 MUX", TAPAN_A_CDC_IIR1_GAIN_B2_CTL, 0, 0,
		&iir1_inp2_mux, tapan_codec_iir_mux_event,
		SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),

		SND_SOC_DAPM_MUX_E("IIR1 INP3 MUX", TAPAN_A_CDC_IIR1_GAIN_B3_CTL, 0, 0,
		&iir1_inp3_mux, tapan_codec_iir_mux_event,
		SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),

		SND_SOC_DAPM_MUX_E("IIR1 INP4 MUX", TAPAN_A_CDC_IIR1_GAIN_B4_CTL, 0, 0,
		&iir1_inp4_mux, tapan_codec_iir_mux_event,
		SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),

		SND_SOC_DAPM_MUX_E("IIR2 INP1 MUX", TAPAN_A_CDC_IIR2_GAIN_B1_CTL, 0, 0,
		&iir2_inp1_mux, tapan_codec_iir_mux_event,
		SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),

		SND_SOC_DAPM_MUX_E("IIR2 INP2 MUX", TAPAN_A_CDC_IIR2_GAIN_B2_CTL, 0, 0,
		&iir2_inp2_mux, tapan_codec_iir_mux_event,
		SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),

		SND_SOC_DAPM_MUX_E("IIR2 INP3 MUX", TAPAN_A_CDC_IIR2_GAIN_B3_CTL, 0, 0,
		&iir2_inp3_mux, tapan_codec_iir_mux_event,
		SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),

		SND_SOC_DAPM_MUX_E("IIR2 INP4 MUX", TAPAN_A_CDC_IIR2_GAIN_B4_CTL, 0, 0,
		&iir2_inp4_mux, tapan_codec_iir_mux_event,
		SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),

		SND_SOC_DAPM_PGA("IIR2", TAPAN_A_CDC_CLK_SD_CTL, 1, 0, NULL, 0),

		/* AUX PGA */
		SND_SOC_DAPM_ADC_E("AUX_PGA_Left", NULL, TAPAN_A_RX_AUX_SW_CTL, 7, 0,
		tapan_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU \|