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Commit 56597e8d authored by Oleg Perelet's avatar Oleg Perelet
Browse files

msm: kgsl: Change hardware clock gating delay 



Extend delay between clk_en and ready signal for TP.

Change-Id: I3ed7cbed4b10f65772d6ef1f7f461fa557b53245
Signed-off-by: default avatarOleg Perelet <operelet@codeaurora.org>
parent bcd93bb6

drivers/gpu/msm/adreno_a4xx.c

+1 −1
Original line number Diff line number Diff line
@@ -540,7 +540,7 @@ static void a4xx_enable_hwcg(struct kgsl_device *device) 
	kgsl_regwrite(device, A4XX_RBBM_CLOCK_DELAY_TSE_RAS_RBBM, 0x00000222);

	kgsl_regwrite(device, A4XX_RBBM_CLOCK_CTL_HLSQ , 0x00000000);

	kgsl_regwrite(device, A4XX_RBBM_CLOCK_HYST_HLSQ, 0x00000000);

	kgsl_regwrite(device, A4XX_RBBM_CLOCK_DELAY_HLSQ, 0x00020000);

	kgsl_regwrite(device, A4XX_RBBM_CLOCK_DELAY_HLSQ, 0x00220000);

	kgsl_regwrite(device, A4XX_RBBM_CLOCK_CTL, 0xAAAAAAAA);

	kgsl_regwrite(device, A4XX_RBBM_CLOCK_CTL2, 0);

}