Loading arch/arm/boot/dts/qcom/mdm9640-bus.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -51,8 +51,8 @@ qcom,base-offset = <0x7000>; qcom,qos-delta = <0x1000>; clock-names = "bus_clk", "bus_a_clk"; clocks = <&clock_gcc clk_snoc_msmbus_clk>, <&clock_gcc clk_snoc_msmbus_a_clk>; clocks = <&clock_gcc clk_pcnoc_msmbus_clk>, <&clock_gcc clk_pcnoc_msmbus_a_clk>; }; fab_snoc: fab-snoc { Loading @@ -65,8 +65,8 @@ qcom,base-offset = <0x7000>; qcom,qos-off = <0x1000>; clock-names = "bus_clk", "bus_a_clk"; clocks = <&clock_gcc clk_pcnoc_msmbus_clk>, <&clock_gcc clk_pcnoc_msmbus_a_clk>; clocks = <&clock_gcc clk_snoc_msmbus_clk>, <&clock_gcc clk_snoc_msmbus_a_clk>; coresight-id = <50>; coresight-name = "coresight-snoc"; Loading Loading
arch/arm/boot/dts/qcom/mdm9640-bus.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -51,8 +51,8 @@ qcom,base-offset = <0x7000>; qcom,qos-delta = <0x1000>; clock-names = "bus_clk", "bus_a_clk"; clocks = <&clock_gcc clk_snoc_msmbus_clk>, <&clock_gcc clk_snoc_msmbus_a_clk>; clocks = <&clock_gcc clk_pcnoc_msmbus_clk>, <&clock_gcc clk_pcnoc_msmbus_a_clk>; }; fab_snoc: fab-snoc { Loading @@ -65,8 +65,8 @@ qcom,base-offset = <0x7000>; qcom,qos-off = <0x1000>; clock-names = "bus_clk", "bus_a_clk"; clocks = <&clock_gcc clk_pcnoc_msmbus_clk>, <&clock_gcc clk_pcnoc_msmbus_a_clk>; clocks = <&clock_gcc clk_snoc_msmbus_clk>, <&clock_gcc clk_snoc_msmbus_a_clk>; coresight-id = <50>; coresight-name = "coresight-snoc"; Loading