Loading arch/arm/boot/dts/qcom/msm8916-coresight.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -424,6 +424,8 @@ clocks = <&clock_rpm clk_qdss_clk>, <&clock_rpm clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; qcom,cti-save; }; cti_cpu1: cti@859000 { Loading @@ -437,6 +439,8 @@ clocks = <&clock_rpm clk_qdss_clk>, <&clock_rpm clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; qcom,cti-save; }; cti_cpu2: cti@85a000 { Loading @@ -450,6 +454,8 @@ clocks = <&clock_rpm clk_qdss_clk>, <&clock_rpm clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; qcom,cti-save; }; cti_cpu3: cti@85b000 { Loading @@ -463,6 +469,8 @@ clocks = <&clock_rpm clk_qdss_clk>, <&clock_rpm clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; qcom,cti-save; }; cti_video_cpu0: cti@830000 { Loading Loading
arch/arm/boot/dts/qcom/msm8916-coresight.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -424,6 +424,8 @@ clocks = <&clock_rpm clk_qdss_clk>, <&clock_rpm clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; qcom,cti-save; }; cti_cpu1: cti@859000 { Loading @@ -437,6 +439,8 @@ clocks = <&clock_rpm clk_qdss_clk>, <&clock_rpm clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; qcom,cti-save; }; cti_cpu2: cti@85a000 { Loading @@ -450,6 +454,8 @@ clocks = <&clock_rpm clk_qdss_clk>, <&clock_rpm clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; qcom,cti-save; }; cti_cpu3: cti@85b000 { Loading @@ -463,6 +469,8 @@ clocks = <&clock_rpm clk_qdss_clk>, <&clock_rpm clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; qcom,cti-save; }; cti_video_cpu0: cti@830000 { Loading