Loading arch/arm/boot/dts/qcom/msmferrum-coresight.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -443,5 +443,15 @@ <&clock_rpm clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; }; fuse: fuse@5e01c { compatible = "arm,coresight-fuse-v2"; reg = <0x5e01c 0x8>; reg-names = "fuse-base"; coresight-id = <28>; coresight-name = "coresight-fuse"; coresight-nr-inports = <0>; }; }; Loading
arch/arm/boot/dts/qcom/msmferrum-coresight.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -443,5 +443,15 @@ <&clock_rpm clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; }; fuse: fuse@5e01c { compatible = "arm,coresight-fuse-v2"; reg = <0x5e01c 0x8>; reg-names = "fuse-base"; coresight-id = <28>; coresight-name = "coresight-fuse"; coresight-nr-inports = <0>; }; };