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Commit 502d872f authored by Tarun Karra's avatar Tarun Karra Committed by Jordan Crouse
Browse files

msm: kgsl: Move VBIF register programming to device start 



In Content Protection trustzone restricts access to all VBIF registers
till GPU driver attaches a pagetable to any IOMMU context bank.
Trying to access VBIF registers before pagetable attach causes
XPU violations on these targets. During device initialization move
all VBIF register access after pagetable attach.

Change-Id: I5e7b1351b5c094668616027c7cd3432ff565a2df
Signed-off-by: default avatarTarun Karra <tkarra@codeaurora.org>
parent 1671535d

drivers/gpu/msm/adreno.c

+24 −0
Original line number Diff line number Diff line
@@ -1054,6 +1054,30 @@ static int _adreno_start(struct adreno_device *adreno_dev) 
	if (regulator_left_on)

		_soft_reset(adreno_dev);



	if (device->pwrctrl.bus_control) {

		/* VBIF waiting for RAM */

		if (!adreno_dev->starved_ram_lo) {

			status |= adreno_perfcounter_get(adreno_dev,

					KGSL_PERFCOUNTER_GROUP_VBIF_PWR, 0,

					&adreno_dev->starved_ram_lo, NULL,

					PERFCOUNTER_FLAG_KERNEL);

		}



		/* VBIF DDR cycles */

		if (!adreno_dev->ram_cycles_lo) {

			status |= adreno_perfcounter_get(adreno_dev,

					KGSL_PERFCOUNTER_GROUP_VBIF,

					VBIF_AXI_TOTAL_BEATS,

					&adreno_dev->ram_cycles_lo, NULL,

					PERFCOUNTER_FLAG_KERNEL);

		}

	}

	if (status) {

		KGSL_DRV_ERR(device,

			"Unable to get perf counters for Bus DCVS\n");

		goto error_mmu_off;

	}



	/* Restore performance counter registers with saved values */

	adreno_perfcounter_restore(adreno_dev);

drivers/gpu/msm/adreno_perfcounter.c

+0 −16
Original line number Diff line number Diff line
@@ -50,7 +50,6 @@ static inline int active_countable(unsigned int countable) 
int adreno_perfcounter_init(struct adreno_device *adreno_dev)

{

	int ret = 0;

	struct kgsl_device *device = &adreno_dev->dev;

	struct adreno_perfcounters *counters = ADRENO_PERFCOUNTERS(adreno_dev);

	struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev);
@@ -71,21 +70,6 @@ int adreno_perfcounter_init(struct adreno_device *adreno_dev) 
	ret = adreno_perfcounter_get(adreno_dev, KGSL_PERFCOUNTER_GROUP_PWR, 1,

			NULL, NULL, PERFCOUNTER_FLAG_KERNEL);



	if (device->pwrctrl.bus_control) {

		/* VBIF waiting for RAM */

		ret |= adreno_perfcounter_get(adreno_dev,

				KGSL_PERFCOUNTER_GROUP_VBIF_PWR, 0,

				&adreno_dev->starved_ram_lo, NULL,

				PERFCOUNTER_FLAG_KERNEL);



		/* VBIF DDR cycles */

		ret |= adreno_perfcounter_get(adreno_dev,

				KGSL_PERFCOUNTER_GROUP_VBIF,

				VBIF_AXI_TOTAL_BEATS,

				&adreno_dev->ram_cycles_lo, NULL,

				PERFCOUNTER_FLAG_KERNEL);

	}



	/* Default performance counter profiling to false */

	adreno_dev->profile.enabled = false;

	return ret;