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Commit 500da96a authored by Venkatesh Yadav Abbarapu's avatar Venkatesh Yadav Abbarapu
Browse files

ARM: dts: msm: Add blsp1_uart3 device to fsm9010 



fsm9010-rumi/cdp/mtp will use uart3 as a serial console.

Change-Id: I22bf6aacd7ffb9b50ac3e25eacc7964ebfe42334
Acked-by: default avatarKaushik Sikdar <ksikdar@qti.qualcomm.com>
Signed-off-by: default avatarVenkatesh Yadav Abbarapu <quicvenkat@codeaurora.org>
parent 05e6c29d

arch/arm/boot/dts/qcom/fsm9010-rumi.dts

+1 −2
Original line number Diff line number Diff line
@@ -21,8 +21,7 @@ 
};



&soc {

	serial@f991f000 {

		qcom,bus-speed-mode = "";

	blsp1_uart2: serial@f991f000 {

		status = "ok";

	};

arch/arm/boot/dts/qcom/fsm9010-v1.0-cdp.dts

+1 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 
};



&soc {

	serial@f991f000 {

	blsp1_uart3: serial@f9920000 {

		status = "ok";

	};

arch/arm/boot/dts/qcom/fsm9010-v1.0-mtp.dts

+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ 




&soc {

	serial@f991f000 {

	blsp1_uart3: serial@f9920000 {

		status = "ok";

	};

arch/arm/boot/dts/qcom/fsm9010.dtsi

+11 −1
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ 
		#clock-cells = <1>;

	};



	serial@f991f000 {

	blsp1_uart2: serial@f991f000 {

		compatible = "qcom,msm-lsuart-v14";

		reg = <0xf991f000 0x1000>;

		clocks = <&clock_gcc clk_gcc_blsp1_uart1_apps_clk>,
@@ -73,6 +73,16 @@ 
		interrupts = <0 95 0>;

	};



	blsp1_uart3: serial@f9920000 {

		compatible = "qcom,msm-lsuart-v14";

		reg = <0xf9920000 0x1000>;

		clocks = <&clock_gcc clk_gcc_blsp1_uart3_apps_clk>,

		<&clock_gcc clk_gcc_blsp1_ahb_clk>;

		clock-names = "core_clk", "iface_clk";

		status = "disabled";

		interrupts = <0 96 0>;

	};



	qcom,smem@fa00000 {

		compatible = "qcom,smem";

		reg = <0x0fa00000 0x200000>,