Loading arch/arm/boot/dts/qcom/msm8909.dtsi +5 −3 Original line number Diff line number Diff line Loading @@ -407,12 +407,14 @@ reg = <0x01d00000 0xff000>; interrupts = <0 44 0>; venus-supply = <&gdsc_venus>; venus-core0-supply = <&gdsc_venus_core0>; clocks = <&clock_gcc clk_gcc_venus0_vcodec0_clk>, <&clock_gcc clk_gcc_venus0_core0_vcodec0_clk>, <&clock_gcc clk_gcc_venus0_ahb_clk>, <&clock_gcc clk_gcc_venus0_axi_clk>; clock-names = "core_clk", "iface_clk", "bus_clk"; qcom,clock-names = "core_clk", "iface_clk", "bus_clk"; qcom,clock-configs = <0x1 0x0 0x0>; clock-names = "core_clk", "core0_clk", "iface_clk", "bus_clk"; qcom,clock-names = "core_clk", "core0_clk", "iface_clk", "bus_clk"; qcom,clock-configs = <0x1 0x0 0x0 0x0>; qcom,sw-power-collapse; qcom,load-freq-tbl = <244800 266670000 0xffffffff>, /* 1080p@30 Decode */ Loading Loading
arch/arm/boot/dts/qcom/msm8909.dtsi +5 −3 Original line number Diff line number Diff line Loading @@ -407,12 +407,14 @@ reg = <0x01d00000 0xff000>; interrupts = <0 44 0>; venus-supply = <&gdsc_venus>; venus-core0-supply = <&gdsc_venus_core0>; clocks = <&clock_gcc clk_gcc_venus0_vcodec0_clk>, <&clock_gcc clk_gcc_venus0_core0_vcodec0_clk>, <&clock_gcc clk_gcc_venus0_ahb_clk>, <&clock_gcc clk_gcc_venus0_axi_clk>; clock-names = "core_clk", "iface_clk", "bus_clk"; qcom,clock-names = "core_clk", "iface_clk", "bus_clk"; qcom,clock-configs = <0x1 0x0 0x0>; clock-names = "core_clk", "core0_clk", "iface_clk", "bus_clk"; qcom,clock-names = "core_clk", "core0_clk", "iface_clk", "bus_clk"; qcom,clock-configs = <0x1 0x0 0x0 0x0>; qcom,sw-power-collapse; qcom,load-freq-tbl = <244800 266670000 0xffffffff>, /* 1080p@30 Decode */ Loading